Ð þí•.8Šd( ÊŠ,'friendlyarm,nanopi-r2srockchip,rk3328 +7FriendlyElec NanoPi R2Saliases=/pinctrl/gpio@ff210000C/pinctrl/gpio@ff220000I/pinctrl/gpio@ff230000O/pinctrl/gpio@ff240000U/serial@ff110000]/serial@ff120000e/serial@ff130000m/i2c@ff150000r/i2c@ff160000w/i2c@ff170000|/i2c@ff180000�/ethernet@ff540000‹/usb@ff600000/device@2•/mmc@ff500000cpus+cpu@0šcpuarm,cortex-a53¦ª±ÀÐxêpsciø €@+8€E@W€du€ cpu@1šcpuarm,cortex-a53¦ª±ÀÐxêpsciø €@+8€E@W€du€ cpu@2šcpuarm,cortex-a53¦ª±ÀÐxêpsciø €@+8€E@W€du€ cpu@3šcpuarm,cortex-a53¦ª±ÀÐxêpsciø €@+8€E@W€du€ idle-statesˆpscicpu-sleeparm,idle-state•¦½xÎúÞ„€l2-cachecacheïû@-€opp-table-0operating-points-v2 €opp-408000000Q–~ð)œ@:opp-600000000#ÃF~ð)œ@opp-8160000000£,B@)œ@opp-1008000000<ÜÈà)œ@opp-1200000000G†Œ±()œ@opp-1296000000M?dÖ )œ@analog-soundsimple-audio-cardFi2s_yAnalog �disabledsimple-audio-card,cpu—simple-audio-card,codec—arm-pmuarm,cortex-a53-pmu0¡defg¬ display-subsystemrockchip,display-subsystem¿  �disabledhdmi-soundsimple-audio-cardFi2s_€yHDMI �disabledsimple-audio-card,cpu—simple-audio-card,codec—psciarm,psci-1.0arm,psci-0.2ñsmctimerarm,armv8-timer0¡   xin24m fixed-clockÅÒn6âxin24m€Ei2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s¦ÿ ¡ª)7õi2s_clki2s_hclk  txrx �disabled€i2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s¦ÿ ¡ª*8õi2s_clki2s_hclktxrx �disabled€i2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s¦ÿ ¡ª+9õi2s_clki2s_hclktxrx �disabledspdif@ff030000rockchip,rk3328-spdif¦ÿ ¡ª.: õmclkhclk tx!default/ �disabledpdm@ff040000 rockchip,pdm¦ÿª=Rõpdm_clkpdm_hclkrx!defaultsleep/9 �disabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfd¦ÿ€:io-domains"rockchip,rk3328-io-voltage-domain�okayCP^lzˆ–gpiorockchip,rk3328-grf-gpio¤´power-controller!rockchip,rk3328-power-controllerÀ+€<power-domain@6¦ªDÀpower-domain@5¦ ª‹BABÀpower-domain@8¦ª�FÀreboot-modesyscon-reboot-modeÔÈÛRBÃçRBÃõRBà RBÃserial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart¦ÿ ¡7ª&Òõbaudclkapb_pclktxrx!default / !" �disabledserial@ff120000&rockchip,rk3328-uartsnps,dw-apb-uart¦ÿ ¡8ª'Óõbaudclkapb_pclktxrx!default /#$% �disabledserial@ff130000&rockchip,rk3328-uartsnps,dw-apb-uart¦ÿ ¡9ª(Ôõbaudclkapb_pclktxrx!default/&�okayi2c@ff150000(rockchip,rk3328-i2crockchip,rk3399-i2c¦ÿ ¡$+ª7Í õi2cpclk!default/' �disabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c¦ÿ ¡%+ª8Î õi2cpclk!default/(�okaypmic@18rockchip,rk805¦ )¡Åâxin32krk805-clkout2¤´/*!default(IW+c+o+{+‡“+regulatorsDCDC_REG1Ÿvdd_log®ÂÔ ß4ì 0Ôregulator-state-mem1B@DCDC_REG2Ÿvdd_arm®ÂÔ ß4ì 0Ô€regulator-state-mem1~ðDCDC_REG3Ÿvcc_ddr®Âregulator-state-memDCDC_REG4 Ÿvcc_io_33®ÂÔ2Z ì2Z €regulator-state-mem12Z LDO_REG1Ÿvcc_18®ÂÔw@ìw@€regulator-state-mem1w@LDO_REG2 Ÿvcc18_emmc®ÂÔw@ìw@€regulator-state-mem1w@LDO_REG3Ÿvdd_10®ÂÔB@ìB@regulator-state-mem1B@i2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c¦ÿ ¡&+ª9Ï õi2cpclk!default/, �disabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c¦ÿ ¡'+ª:Ð õi2cpclk!default/- �disabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi¦ÿ ¡1+ª Ñõspiclkapb_pclk txrx!default/./01 �disabledwatchdog@ff1a0000 rockchip,rk3328-wdtsnps,dw-wdt¦ÿ ¡(ªìpwm@ff1b0000rockchip,rk3328-pwm¦ÿª<Ö õpwmpclk!default/2M �disabledpwm@ff1b0010rockchip,rk3328-pwm¦ÿª<Ö õpwmpclk!default/3M �disabledpwm@ff1b0020rockchip,rk3328-pwm¦ÿ ª<Ö õpwmpclk!default/4M�okaypwm@ff1b0030rockchip,rk3328-pwm¦ÿ0ª<Ö õpwmpclk!default/5M �disableddma-controller@ff1f0000arm,pl330arm,primecell¦ÿ@¡Xª† õapb_pclko€thermal-zonessoc-thermalz�èžè°6tripstrip-point0ÀpÌСpassivetrip-point1ÀLÌСpassive€7soc-critÀsÌÐ ¡criticalcooling-mapsmap0×70Ü ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿëtsadc@ff250000rockchip,rk3328-tsadc¦ÿ% ¡:ø$ÃPª$Õõtsadcapb_pclk!initdefaultsleep/8998'B .tsadc-apb::G† ^�okayt‹€6efuse@ff260000rockchip,rk3328-efuse¦ÿ&P+ª> õpclk_efuse¦ id@7¦cpu-leakage@17¦logic-leakage@19¦cpu-version@1a¦º€Fadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc¦ÿ( ¡P¿ª%êõsaradcapb_pclk'V .saradc-apb �disabledgpu@ff300000"rockchip,rk3328-maliarm,mali-450¦ÿ0T¡ZW]XY[\"Ñgpgpmmupppp0ppmmu0pp1ppmmu1ª‡‡ õbuscore'fiommu@ff330200rockchip,iommu¦ÿ3 ¡`ª“Ý õaclkifaceá �disablediommu@ff340800rockchip,iommu¦ÿ4@ ¡bª�F õaclkifaceá �disabledvideo-codec@ff350000rockchip,rk3328-vpu¦ÿ5 ¡ Ñvdpuª�F õaclkhclkî;õ<iommu@ff350800rockchip,iommu¦ÿ5@ ¡ ª�F õaclkifaceáõ<€;video-codec@ff360000*rockchip,rk3328-vdecrockchip,rk3399-vdec¦ÿ6€ ¡ ª‹BABõaxiahbcabaccoreø‹AB ׄׄá£î=õ<iommu@ff360480rockchip,iommu ¦ÿ6€@ÿ6À@ ¡Jª‹B õaclkifaceáõ<€=vop@ff370000rockchip,rk3328-vop¦ÿ7>ü ¡ ª‘x;õaclk_vopdclk_vophclk_vop'…†‡ .axiahbdclkî> �disabledport+€ endpoint@0¦?€Diommu@ff373f00rockchip,iommu¦ÿ7? ¡ ª‘; õaclkifaceá �disabled€>hdmi@ff3c0000rockchip,rk3328-dw-hdmi¦ÿ< ¡#ªçFõiahbisfrcec@hdmi!default /ABC:: �disabled€ports+port@0¦endpointD€?port@1¦codec@ff410000rockchip,rk3328-codec¦ÿAªë* õpclkmclk:: �disabled€phy@ff430000rockchip,rk3328-hdmi-phy¦ÿC ¡SªäEyõsysclkrefoclkrefpclk âhdmi_phyÅ"F .cpu-version? �disabled€@clock-controller@ff440000(rockchip,rk3328-crurockchip,crusyscon¦ÿD::ÅJøøx=&'(ˆ‰Ž…ƒŠŒ�ABDC"\5ˆH؉4æ$WzEEE|©€n6n6n6äáÀäáÀá£õáׄõáúð€õáõáõáúð€úð€úð€úð€n6#ÃFLG†ŒðÑ€xhÀxhÀðÑ€xhÀxhÀ€€syscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfd¦ÿE+usb2phy@100rockchip,rk3328-usb2phy¦ªEõphyclk âusb480m_phyÅø{WG�okay€Gotg-port?$¡;<=Ñotg-bvalidotg-idlinestate�okay€Thost-port? ¡> Ñlinestate�okay€Ummc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc¦ÿP@ ¡  ª=!JNõbiuciuciu-driveciu-samplenyðÑ€'m.reset�okay‡‘¢/HIJK!default­ºÇÔâLîmmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc¦ÿQ@ ¡  ª>"KOõbiuciuciu-driveciu-samplenyðÑ€'n.reset �disabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc¦ÿR@ ¡ ª?#LPõbiuciuciu-driveciu-samplenyðÑ€'o.reset �disabledethernet@ff540000rockchip,rk3328-gmac¦ÿT ¡Ñmacirq8ªdWXZY–ßMõstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac'c .stmmaceth::û �okayødfWMM"input/N:rgmiiC/O!defaultNW`$mdiosnps,dwmac-mdio+ethernet-phy@1¦/P!defaulti'yÃP ‹)€Nethernet@ff550000rockchip,rk3328-gmac¦ÿU:: ¡Ñmacirq8ªTSSU•ÞVIõstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphy'b .stmmaceth:rmii/Qû "output �disabledmdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22¦ªV'd!default/RS—€Qusb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2¦ÿX ¡ªMõotg©host±ÃÒ€€@ T usb2-phy�okayusb@ff5c0000 generic-ehci¦ÿ\ ¡ ªNGUusb�okayusb@ff5d0000 generic-ohci¦ÿ] ¡ ªNGUusb�okaymmc@ff5f00000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc¦ÿ_@ ¡ ª@MQõbiuciuciu-driveciu-samplenyðÑ€'h.reset �disabledusb@ff600000rockchip,rk3328-dwc3snps,dwc3¦ÿ` ¡Cª`a„õref_clksuspend_clkbus_clk©host áutmi_wideê  # E f �okay+device@2 usbbda,8153¦interrupt-controller@ff811000 arm,gic-400 ˜ ©@¦ÿ�ÿ� ÿ�@ ÿ�`  ¡ €crypto@ff060000rockchip,rk3328-crypto¦ÿ@ ¡ªPQ;õhclk_masterhclk_slavesclk'D .crypto-rstpinctrlrockchip,rk3328-pinctrl::+ ¾gpio@ff210000rockchip,gpio-bank¦ÿ! ¡3ªÈ¤´ © ˜€bgpio@ff220000rockchip,gpio-bank¦ÿ" ¡4ªÉ¤´ © ˜€)gpio@ff230000rockchip,gpio-bank¦ÿ# ¡5ªÊ¤´ © ˜€fgpio@ff240000rockchip,gpio-bank¦ÿ$ ¡6ªË¤´ © ˜pcfg-pull-up Å€Xpcfg-pull-down Ò€`pcfg-pull-none á€Vpcfg-pull-none-2ma á î€_pcfg-pull-up-2ma Å îpcfg-pull-up-4ma Å î€Ypcfg-pull-none-4ma á î€\pcfg-pull-down-4ma Ò îpcfg-pull-none-8ma á î€Zpcfg-pull-up-8ma Å î€[pcfg-pull-none-12ma á î €]pcfg-pull-up-12ma Å î €^pcfg-output-high ýpcfg-output-low pcfg-input-high Å €Wpcfg-input i2c0i2c0-xfer !VV€'i2c1i2c1-xfer !VV€(i2c2i2c2-xfer ! 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Xspi0-1spi0m1-clk !Xspi0m1-cs0 !Xspi0m1-tx !Xspi0m1-rx !Xspi0m1-cs1 !Xspi0-2spi0m2-clk !X€.spi0m2-cs0 !X€1spi0m2-tx !X€/spi0m2-rx !X€0i2s1i2s1-mclk !Vi2s1-sclk !Vi2s1-lrckrx !Vi2s1-lrcktx !Vi2s1-sdi !Vi2s1-sdo !Vi2s1-sdio1 !Vi2s1-sdio2 !Vi2s1-sdio3 !Vi2s1-sleep� !WWWWWWWWWi2s2-0i2s2m0-mclk !Vi2s2m0-sclk !Vi2s2m0-lrckrx !Vi2s2m0-lrcktx !Vi2s2m0-sdi !Vi2s2m0-sdo !Vi2s2m0-sleep` !WWWWWWi2s2-1i2s2m1-mclk !Vi2s2m1-sclk !Vi2sm1-lrckrx !Vi2s2m1-lrcktx !Vi2s2m1-sdi !Vi2s2m1-sdo !Vi2s2m1-sleepP !WWWWWspdif-0spdifm0-tx !Vspdif-1spdifm1-tx !Vspdif-2spdifm2-tx !V€sdmmc0-0sdmmc0m0-pwren !Ysdmmc0m0-pin !Ysdmmc0-1sdmmc0m1-pwren !Ysdmmc0m1-pin !Y€hsdmmc0sdmmc0-clk !Z€Hsdmmc0-cmd ![€Isdmmc0-dectn !Y€Jsdmmc0-wrprt !Ysdmmc0-bus1 ![sdmmc0-bus4@ ![[[[€Ksdmmc0-pins€ !YYYYYYYYsdmmc0extsdmmc0ext-clk !\sdmmc0ext-cmd !Ysdmmc0ext-wrprt !Ysdmmc0ext-dectn !Ysdmmc0ext-bus1 !Ysdmmc0ext-bus4@ !YYYYsdmmc0ext-pins€ !YYYYYYYYsdmmc1sdmmc1-clk ! Zsdmmc1-cmd ! [sdmmc1-pwren ![sdmmc1-wrprt ![sdmmc1-dectn ![sdmmc1-bus1 ![sdmmc1-bus4@ ![[[[sdmmc1-pins� ! Y YYYYYYYYemmcemmc-clk !]emmc-cmd !^emmc-pwren !Vemmc-rstnout !Vemmc-bus1 !^emmc-bus4@ !^^^^emmc-bus8€ !^^^^^^^^pwm0pwm0-pin !V€2pwm1pwm1-pin !V€3pwm2pwm2-pin !V€4pwmirpwmir-pin !V€5gmac-1rgmiim1-pins` ! Z \\Z\\\ \ \Z Z\\ZZZ Z\ZZZZ€Ormiim1-pins !_]____ _ _] ] V VVVVVgmac2phyfephyled-speed10 !Vfephyled-duplex !Vfephyled-rxm1 !V€Rfephyled-txm1 !Vfephyled-linkm1 !V€Stsadc_pintsadc-int ! Vtsadc-pin ! Vhdmi_pinhdmi-cec !V€Ahdmi-hpd !`€Ccif-0dvp-d2d9-m0À !VVVVV V V VVVVVcif-1dvp-d2d9-m1À !VVVVVVVVVVVVbuttonreset-button-pin !V€agmac2ioeth-phy-reset-pin !`€Pledslan-led-pin !V€csys-led-pin !V€dwan-led-pin !V€elanlan-vdd-pin !V€ipmicpmic-int-l !X€*sdsdio-vcc-pin !X€gchosen /serial2:1500000n8gmac-clock fixed-clockÒsY@ âgmac_clkinÅ€Mkeys gpio-keys/a!defaultkey-reset ;reset ‘b A˜ L2leds gpio-leds /cde!defaultled-0 ‘f ;nanopi-r2s:green:lanled-1 ‘b ;nanopi-r2s:red:sys ^onled-2 ‘f ;nanopi-r2s:green:wansdmmcio-regulatorregulator-gpio l ‘)/g!default Ÿvcc_io_sdio®Ôw@ì2Z  ˆ švoltage ©ÐÉw@2Z  º€sdmmc-regulatorregulator-fixed Åb/h!defaultŸvcc_sdÂÔ2Z ì2Z  º€Lvdd-5vregulator-fixedŸvdd_5v®ÂÔLK@ìLK@€+vdd-5v-lanregulator-fixed l Åf/i!default Ÿvdd_5v_lan®Â º+ compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3serial0serial1serial2i2c0i2c1i2c2i2c3ethernet0ethernet1mmc0device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesclock-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1pmuio-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shiftrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,grfrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarityrockchip,efuse-sizebits#io-channel-cellsinterrupt-names#iommu-cellsiommuspower-domainsremote-endpointphysphy-namesnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthmax-frequencybus-widthcap-sd-highspeeddisable-wpsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplytx-fifo-depthrx-fifo-depthsnps,txpblclock_in_outphy-handlephy-modephy-supplyrx_delaysnps,aaltx_delayreset-assert-usreset-deassert-usreset-gpiosphy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerrangesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathlabellinux,codedebounce-intervaldefault-stateenable-active-highregulator-settling-time-usregulator-typestartup-delay-usvin-supplygpio