Ð þí®¿8¤ì( Ó¤´ anbernic,rg351mrockchip,rk3326 +7Anbernic RG351Maliases=/i2c@ff180000B/i2c@ff190000G/i2c@ff1a0000L/i2c@ff1b0000Q/serial@ff030000Y/serial@ff158000a/serial@ff160000i/serial@ff168000q/serial@ff170000y/serial@ff178000�/spi@ff1d0000†/spi@ff1d8000‹/mmc@ff370000cpus+cpu@0�cpuarm,cortex-a35œ psci®µÄÔZî cpu@1�cpuarm,cortex-a35œ psci®µÄÔZî cpu@2�cpuarm,cortex-a35œ psci®µÄÔZî cpu@3�cpuarm,cortex-a35œ psci®µÄÔZî idle-statespscicpu-sleeparm,idle-state"3Jx[úk„ cluster-sleeparm,idle-state"3J�[ôkÐ opp-table-0operating-points-v2| opp-600000000‡#ÃF Ž~ð~ð™pœœ@­opp-816000000‡0£, Ž��™pœœ@opp-1008000000‡<Ü ŽíØíØ™pœœ@opp-1200000000‡G†Œ ŽÖ Ö ™pœœ@opp-1296000000‡M?d Ž™p™p™pœœ@arm-pmuarm,cortex-a35-pmu0¹defgÄ display-subsystemrockchip,display-subsystem× Ýokayexternal-gmac-clock fixed-clockäúð€ ôgmac_clkinpsci arm,psci-1.0§smctimerarm,armv8-timer0¹   thermal-zonessoc-thermal*è8îJ tripstrip-point-0ZpfЗpassivetrip-point-1ZLfЗpassive soc-critZÁ8fÐ —criticalcooling-mapsmap0q  vÿÿÿÿÿÿÿÿ…gpu-thermald*èJ tripsgpu-thresholdZpfЗpassivegpu-targetZLfЗpassive gpu-critZÁ8fÐ —criticalcooling-mapsmap0q vÿÿÿÿÿÿÿÿxin24m fixed-clockän6ôxin24m lpower-management@ff000000$rockchip,px30-pmusysconsimple-mfdœÿpower-controllerrockchip,px30-power-controller’+ npower-domain@5œ®<¦’power-domain@7œ®÷;¦’power-domain@9œ  ®²C@?¦’power-domain@10œ @®þÿ978:¦’power-domain@11œ ®¯ôK¦’power-domain@12œ X®·µ¶–—ýûüD56¦’power-domain@13œ (®³´ùú3¦ !"’power-domain@14œ®I¦#’syscon@ff010000'rockchip,px30-pmugrfsysconsimple-mfdœÿ+ —io-domains$rockchip,px30-pmu-io-voltage-domainÝokay­$»$reboot-modesyscon-reboot-modeÉÐRBÃàRBà îRBÃúRBÃRBÃserial@ff030000$rockchip,px30-uartsnps,dw-apb-uartœÿ ¹®%%baudclkapb_pclk &&%txrx/9Fdefault T'() Ýdisabledi2s@ff060000rockchip,px30-i2s-tdmœÿ ¹ ®mclk_txmclk_rxhclk &&%txrx^*k„¿ rtx-mrx-mFdefault0T+,-./0123456~ Ýdisabledi2s@ff070000&rockchip,px30-i2srockchip,rk3066-i2sœÿ ¹ ®i2s_clki2s_hclk &&%txrxFdefaultT789:~Ýokay ¨i2s@ff080000&rockchip,px30-i2srockchip,rk3066-i2sœÿ ¹®i2s_clki2s_hclk &&%txrxFdefaultT;<=>~ Ýdisabledinterrupt-controller@ff131000 arm,gic-400� @œÿÿ ÿ@ ÿ`  ¹  syscon@ff140000$rockchip,px30-grfsysconsimple-mfdœÿ+ *io-domains rockchip,px30-io-voltage-domainÝokayµ?Ã@Ñ?ß?í?û?lvdsrockchip,px30-lvds Adphy^*lvds Ýdisabledports+port@0œ+endpoint@0œ(B ”port@1œserial@ff158000$rockchip,px30-uartsnps,dw-apb-uartœÿ€ ¹®Ibaudclkapb_pclk &&%txrx/9Fdefault TCDE Ýdisabledserial@ff160000$rockchip,px30-uartsnps,dw-apb-uartœÿ ¹®Jbaudclkapb_pclk &&%txrx/9FdefaultTFÝokayserial@ff168000$rockchip,px30-uartsnps,dw-apb-uartœÿ€ ¹®Kbaudclkapb_pclk &&%txrx/9Fdefault TGHI Ýdisabledserial@ff170000$rockchip,px30-uartsnps,dw-apb-uartœÿ ¹®Lbaudclkapb_pclk && %txrx/9Fdefault TJKL Ýdisabledserial@ff178000$rockchip,px30-uartsnps,dw-apb-uartœÿ€ ¹®Mbaudclkapb_pclk & & %txrx/9Fdefault TMNO Ýdisabledi2c@ff180000&rockchip,px30-i2crockchip,rk3399-i2cœÿ®N i2cpclk ¹FdefaultTP+Ýokayä€8Ppmic@20rockchip,rk817œ mclkôrk808-clkout1xin32k® Q¹ TRSFdefault~guT�T�T™T¥T±T½TÉT §regulatorsDCDC_REG1ÕéûŒ0~ð +vdd_logic:q Šregulator-state-memOg~ðDCDC_REG2Õéû™p~ð+vdd_arm:q regulator-state-memƒg~ðDCDC_REG3Õé+vcc_ddrregulator-state-memODCDC_REG4Õéû2Z 2Z +vcc_3v3 ?regulator-state-memƒg2Z LDO_REG2Õéûw@w@+vcc_1v8 kregulator-state-memOgw@LDO_REG3ÕéûB@B@+vdd_1v0regulator-state-memOgB@LDO_REG4Õéû2Z 2Z  +vcc3v3_pmu $regulator-state-memOg2Z LDO_REG5Õéû2Z w@ +vccio_sd @regulator-state-memOg2Z LDO_REG6éû2Z 2Z +vcc_sd wregulator-state-memOg2Z LDO_REG7û2Z 2Z +vcc_bl £regulator-state-memƒg2Z LDO_REG8û*¹€*¹€+vcc_lcd �regulator-state-memƒg*¹€LDO_REG9û2Z 2Z  +vcc_wifiregulator-state-memƒg2Z BOOSTÕéûReÀLK@ +usb_miducodecœi2c@ff190000&rockchip,px30-i2crockchip,rk3399-i2cœÿ®O i2cpclk ¹FdefaultTU+ Ýdisabledi2c@ff1a0000&rockchip,px30-i2crockchip,rk3399-i2cœÿ®P i2cpclk ¹ FdefaultTV+ Ýdisabledi2c@ff1b0000&rockchip,px30-i2crockchip,rk3399-i2cœÿ® Q i2cpclk ¹ FdefaultTW+ Ýdisabledspi@ff1d0000&rockchip,px30-spirockchip,rk3066-spiœÿ ¹®$Uspiclkapb_pclk & & %txrx¹FdefaultTXYZ[+ Ýdisabledspi@ff1d8000&rockchip,px30-spirockchip,rk3066-spiœÿ€ ¹®%Vspiclkapb_pclk &&%txrx¹FdefaultT\]^_`+ Ýdisabledwatchdog@ff1e0000rockchip,px30-wdtsnps,dw-wdtœÿ®[ ¹% Ýdisabledpwm@ff200000&rockchip,px30-pwmrockchip,rk3328-pwmœÿ ®"S pwmpclkFdefaultTaÀÝokay ©pwm@ff200010&rockchip,px30-pwmrockchip,rk3328-pwmœÿ ®"S pwmpclkFdefaultTbÀÝokay ¤pwm@ff200020&rockchip,px30-pwmrockchip,rk3328-pwmœÿ ®"S pwmpclkFdefaultTcÀ Ýdisabledpwm@ff200030&rockchip,px30-pwmrockchip,rk3328-pwmœÿ 0®"S pwmpclkFdefaultTdÀ Ýdisabledpwm@ff208000&rockchip,px30-pwmrockchip,rk3328-pwmœÿ €®#T pwmpclkFdefaultTeÀ Ýdisabledpwm@ff208010&rockchip,px30-pwmrockchip,rk3328-pwmœÿ €®#T pwmpclkFdefaultTfÀ Ýdisabledpwm@ff208020&rockchip,px30-pwmrockchip,rk3328-pwmœÿ € ®#T pwmpclkFdefaultTgÀ Ýdisabledpwm@ff208030&rockchip,px30-pwmrockchip,rk3328-pwmœÿ €0®#T pwmpclkFdefaultThÀ Ýdisabledtimer@ff210000*rockchip,px30-timerrockchip,rk3288-timerœÿ! ¹®Y& pclktimerdma-controller@ff240000arm,pl330arm,primecellœÿ$@¹Ë®» apb_pclkâ &tsadc@ff280000rockchip,px30-tsadcœÿ( ¹$í,ýÃP®,Xtsadcapb_pclkk¨ rtsadc-apb^*ÔÀFinitdefaultsleepTi)j3i=Ýokay saradc@ff288000,rockchip,px30-saradcrockchip,rk3399-saradcœÿ(€ ¹TS®-Wsaradcapb_pclkk¥ rsaradc-apbÝokayeknvmem@ff290000rockchip,px30-otpœÿ)@®/Zaotpapb_pclkphyk´rphy+id@7œcpu-leakage@17œperformance@1eœqclock-controller@ff2b0000rockchip,px30-cruœÿ+ ®l% xin24mgpll^*v8í«°ðõ@IýFÏq ë ëÂðÑ€ðÑ€õá ë clock-controller@ff2bc000rockchip,px30-pmucruœÿ+À®lxin24m^*ví%%% ýG†Œõጺ€ %syscon@ff2c0000,rockchip,px30-usb2phy-grfsysconsimple-mfdœÿ,+usb2phy@100rockchip,px30-usb2phyœ ®% phyclkíƒm ôusb480m_phyÝokay mhost-portš ¹D ¥linestateÝokay potg-portš$¹BA@¥otg-bvalidotg-idlinestate Ýdisabled ophy@ff2e0000rockchip,px30-dsi-dphyœÿ.®% E refpclkk>rapbšµn Ýokay Aphy@ff2f0000rockchip,px30-csi-dphyœÿ/@®Fpclkšµn k/rapb^* Ýdisabled –usb@ff3000000rockchip,px30-usbrockchip,rk3066-usbsnps,dwc2œÿ0 ¹>®otgÃotgËÝ쀀@  o usb2-phyµnÝokayusb@ff340000 generic-ehciœÿ4 ¹<® pusbµn Ýdisabledusb@ff350000 generic-ohciœÿ5 ¹=® pusbµn Ýdisabledethernet@ff360000rockchip,px30-gmacœÿ6 ¹+¥macirq@®>??@A²CL[stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macclk_mac_speed^*ûrmiiFdefaultTqrµn k^ rstmmaceth Ýdisabledmmc@ff370000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshcœÿ7@ ¹6 ®÷;CDbiuciuciu-driveciu-sampleðÑ€FdefaultTstuvµnÝokay'8È JQS`mzˆw”@mmc@ff380000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshcœÿ8@ ¹7 ®ÿ8EFbiuciuciu-driveciu-sampleðÑ€Fdefault Txyzµn  Ýdisabledmmc@ff390000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshcœÿ9@ ¹5 ®9GHbiuciuciu-driveciu-sampleðÑ€Fdefault T{|}µn  Ýdisabledspi@ff3a0000 rockchip,sfcœÿ:@ ¹8®:clk_sfchclk_sfc T~€Fdefaultµn Ýokay+flash@0jedec,spi-norœ¡oó³Änand-controller@ff3b0000rockchip,px30-nfcœÿ;@ ¹9®þ7ahbnfcí7ýðÑ€Fdefault T�‚ƒ„…†‡ˆµn  Ýdisabledopp-table-1operating-points-v2 ‰opp-200000000‡ ëÂŽ~ðopp-300000000‡á£Žà˜opp-400000000‡ׄŽ�opp-480000000‡œ8Ž*ˆgpu@ff400000$rockchip,px30-maliarm,mali-bifrostœÿ@@$¹/.- ¥jobmmugpu®Iµµnî‰ÝokayÕŠ video-codec@ff442000rockchip,px30-vpuœÿD ¹PO ¥vepuvdpu®¯ô aclkhclkድn iommu@ff442800rockchip,iommuœÿD( ¹Q®¯ô aclkifaceèµn  ‹dsi@ff450000(rockchip,px30-mipi-dsisnps,dw-mipi-dsiœÿE ¹K®Dpclk Adphyµn k=rapb^*+Ýokayports+port@0œ+endpoint@0œ(Œ “port@1œendpoint(� ‘panel@0œõŽ ÿ�elida,kd35t133 �!�portendpoint(‘ �vop@ff460000rockchip,px30-vop-bigœÿFü ¹M®µ–ûaclk_vopdclk_vophclk_vopk345 raxiahbdclká’µn Ýokayport+ endpoint@0œ(“ Œendpoint@1œ(” Biommu@ff460f00rockchip,iommuœÿF ¹M®µû aclkifaceµn èÝokay ’isp@ff4a0000rockchip,px30-cif-ispœÿJ€$¹FIJ ¥ispmimipi ®3´ú_ispaclkhclkpclká• –dphyµn  Ýdisabledports+port@0œ+iommu@ff4a8000rockchip,iommuœÿJ€ ¹F®´ú aclkifaceµn ,è •qos@ff518000rockchip,px30-qossysconœÿQ€  qos@ff520000rockchip,px30-qossysconœÿR  #qos@ff52c000rockchip,px30-qossysconœÿRÀ  qos@ff538000rockchip,px30-qossysconœÿS€  qos@ff538080rockchip,px30-qossysconœÿS€€  qos@ff538100rockchip,px30-qossysconœÿS�  qos@ff538180rockchip,px30-qossysconœÿS�€  qos@ff540000rockchip,px30-qossysconœÿT  qos@ff540080rockchip,px30-qossysconœÿT€  qos@ff548000rockchip,px30-qossysconœÿT€  qos@ff548080rockchip,px30-qossysconœÿT€€  qos@ff548100rockchip,px30-qossysconœÿT�  qos@ff548180rockchip,px30-qossysconœÿT�€  !qos@ff548200rockchip,px30-qossysconœÿT‚  "qos@ff550000rockchip,px30-qossysconœÿU  qos@ff550080rockchip,px30-qossysconœÿU€  qos@ff550100rockchip,px30-qossysconœÿU  qos@ff550180rockchip,px30-qossysconœÿU€  qos@ff558000rockchip,px30-qossysconœÿU€  qos@ff558080rockchip,px30-qossysconœÿU€€  pinctrlrockchip,px30-pinctrl^*G—+Tgpio@ff040000rockchip,gpio-bankœÿ ¹®%[k � Qgpio@ff250000rockchip,gpio-bankœÿ% ¹®\[k �gpio@ff260000rockchip,gpio-bankœÿ& ¹®][k � ¦gpio@ff270000rockchip,gpio-bankœÿ' ¹®^[k � �pcfg-pull-upw špcfg-pull-down„ ¡pcfg-pull-none“ ™pcfg-pull-none-2ma“ pcfg-pull-up-2maw pcfg-pull-up-4maw  ›pcfg-pull-none-4ma“ pcfg-pull-down-4ma„ pcfg-pull-none-8ma“  žpcfg-pull-up-8maw  œpcfg-pull-none-12ma“    pcfg-pull-up-12maw   Ÿpcfg-pull-none-smt“¯ ˜pcfg-output-highÄpcfg-output-lowÐ ¢pcfg-input-highwÛ �pcfg-inputÛi2c0i2c0-xfer è˜ ˜ Pi2c1i2c1-xfer 蘘 Ui2c2i2c2-xfer 蘘 Vi2c3i2c3-xfer è ˜ ˜ Wtsadctsadc-otp-pinè™ itsadc-otp-outè™ juart0uart0-xfer è š š 'uart0-ctsè ™ (uart0-rtsè ™ )uart1uart1-xfer èšš Cuart1-ctsè™ Duart1-rtsè™ Euart2-m0uart2m0-xfer èššuart2-m1uart2m1-xfer è šš Fuart3-m0uart3m0-xfer èššuart3m0-ctsè™uart3m0-rtsè™uart3-m1uart3m1-xfer èšš Guart3m1-ctsè ™ Huart3m1-rtsè ™ Iuart4uart4-xfer èšš Juart4-ctsè™ Kuart4-rtsè™ Luart5uart5-xfer èšš Muart5-ctsè™ Nuart5-rtsè™ Ospi0spi0-clkè› Xspi0-csnè› Yspi0-misoè › Zspi0-mosiè › [spi0-clk-hsèœspi0-miso-hsè œspi0-mosi-hsè œspi1spi1-clkè› \spi1-csn0è › ]spi1-csn1è › ^spi1-misoè› _spi1-mosiè › `spi1-clk-hsèœspi1-miso-hsèœspi1-mosi-hsè œpdmpdm-clk0m0è™pdm-clk0m1è™pdm-clk1è™pdm-sdi0m0è™pdm-sdi0m1è™pdm-sdi1è™pdm-sdi2è™pdm-sdi3è™pdm-clk0m0-sleepè�pdm-clk0m1-sleepè�pdm-clk1-sleepè�pdm-sdi0m0-sleepè�pdm-sdi0m1-sleepè�pdm-sdi1-sleepè�pdm-sdi2-sleepè�pdm-sdi3-sleepè�i2s0i2s0-8ch-mclkè™i2s0-8ch-sclktxè™ +i2s0-8ch-sclkrxè ™ ,i2s0-8ch-lrcktxè™ -i2s0-8ch-lrckrxè ™ .i2s0-8ch-sdo0è™ /i2s0-8ch-sdo1è™ 1i2s0-8ch-sdo2è™ 3i2s0-8ch-sdo3è™ 5i2s0-8ch-sdi0è™ 0i2s0-8ch-sdi1è ™ 2i2s0-8ch-sdi2è ™ 4i2s0-8ch-sdi3è™ 6i2s1i2s1-2ch-mclkè™ Si2s1-2ch-sclkè™ 7i2s1-2ch-lrckè™ 8i2s1-2ch-sdiè™ 9i2s1-2ch-sdoè™ :i2s2i2s2-2ch-mclkè™i2s2-2ch-sclkè™ ;i2s2-2ch-lrckè™ <i2s2-2ch-sdiè™ =i2s2-2ch-sdoè™ >sdmmcsdmmc-clkèž ssdmmc-cmdèœ tsdmmc-detèœ usdmmc-bus1èœsdmmc-bus4@蜜œœ vsdiosdio-clkè™ zsdio-cmdèš ysdio-bus4@èšššš xemmcemmc-clkè ž {emmc-cmdè œ |emmc-rstnoutè ™emmc-bus1èœemmc-bus4@蜜œœemmc-bus8€èœœœœœœœœ }flashflash-cs0è™ „flash-rdyè ™ †flash-dqsè ™ ˆflash-aleè ™ �flash-cleè ™ ƒflash-wrnè ™ ‡flash-cslè™flash-rdnè™ …flash-bus8€èŸŸŸŸŸŸŸŸ ‚sfcsfc-bus4@è™™™™sfc-bus2 è™™ €sfc-cs0è™ sfc-clkè ™ ~lcdclcdc-rgb-dclk-pinè lcdc-rgb-m0-hsync-pinè lcdc-rgb-m0-vsync-pinè lcdc-rgb-m0-den-pinè lcdc-rgb888-m0-data-pins€èžžžž ž ž žžžž ž žžžžžžžžžžžžžlcdc-rgb666-m0-data-pins èžžžž ž ž žžžž ž žžžžžžžlcdc-rgb565-m0-data-pinsèžžžž ž ž žžžž ž žžžžžlcdc-rgb888-m1-data-pinsèžž ž ž žžžžžžžžžžžžžlcdc-rgb666-m1-data-pins°èžž ž ž žžžžžžžlcdc-rgb565-m1-data-pins�èžž ž ž žžžžžpwm0pwm0-pinè™ apwm1pwm1-pinè™ bpwm2pwm2-pinè ™ cpwm3pwm3-pinè™ dpwm4pwm4-pinè™ epwm5pwm5-pinè™ fpwm6pwm6-pinè™ gpwm7pwm7-pinè™ hgmacrmii-pins�è   ™™™™™ ™ qmac-refclk-12maè   rmac-refclkè ™cif-m0cif-clkout-m0è ™dvp-d2d9-m0Àè™™™™™™™™™ ™ ™ ™dvp-d0d1-m0 è ™™d10-d11-m0 è™™cif-m1cif-clkout-m1è™dvp-d2d9-m1Àè™™™™ ™ ™™™™™™™dvp-d0d1-m1 è™™d10-d11-m1 è™™ispisp-prelightè™headphonehp-detè¡ledsled-pinè ™ ¥pmicdc-detè ™pmic-intè š Rsoc_slppin_gpioè¢soc_slppin_rstè™soc_slppin_slpè™chosenöserial2:115200n8backlightpwm-backlight £ ¤a¨ Žgpio-leds gpio-ledsFdefaultT¥led-0  M¦  chargingrk817-soundsimple-audio-card #rk817_int :i2s S¦ q9 ‹MicrophoneMic JackHeadphoneHeadphonesSpeakerSpeaker; ¥MICLMic JackHeadphonesHPOLHeadphonesHPORSpeakerSPKOsimple-audio-card,codec ¿§simple-audio-card,cpu ¿¨vccsysregulator-fixed +vcc3v8_sysÕ9ûÀû9ûÀ Tvibrator pwm-vibrator ©B@ Éenable compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3serial0serial1serial2serial3serial4serial5spi0spi1mmc0device_typeregenable-methodclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityportsstatusclock-frequencyclock-output-names#clock-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontribution#power-domain-cellspm_qospmuio1-supplypmuio2-supplyoffsetmode-bootloadermode-fastbootmode-loadermode-normalmode-recoveryclock-namesdmasdma-namesreg-shiftreg-io-widthpinctrl-namespinctrl-0rockchip,grfresetsreset-names#sound-dai-cells#interrupt-cellsinterrupt-controllervccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyphysphy-namesrockchip,outputremote-endpointi2c-scl-falling-time-nsi2c-scl-rising-time-nswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyregulator-always-onregulator-boot-onregulator-max-microvoltregulator-min-microvoltregulator-nameregulator-ramp-delayregulator-on-in-suspendregulator-suspend-microvoltregulator-off-in-suspendrockchip,mic-in-differentialnum-cs#pwm-cellsarm,pl330-periph-burst#dma-cellsassigned-clocksassigned-clock-ratesrockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#io-channel-cellsvref-supplybits#reset-cellsassigned-clock-parents#phy-cellsinterrupt-namespower-domainsdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy-modebus-widthfifo-depthmax-frequencycap-sd-highspeedcard-detect-delaycd-gpiossd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplyspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthmali-supplyiommus#iommu-cellsbacklightreset-gpiosiovcc-supplyrotationvdd-supplyrockchip,disable-mmu-resetrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathpower-supplypwmscolorfunctionsimple-audio-card,namesimple-audio-card,formatsimple-audio-card,hp-det-gpiosimple-audio-card,mclk-fssimple-audio-card,widgetssimple-audio-card,routingsound-daipwm-names