Ð þí®s8¨`(¨($mediatek,mt8186-evbmediatek,mt8186 +!7MediaTek MT8186 evaluation board =embeddedaliasesJ/soc/ovl@14005000O/soc/ovl@14006000W/soc/rdma@14007000]/soc/rdma@1401f000c/soc/serial@11002000ccimediatek,mt8186-ccikrcciintermediate~’!opp-table-ccioperating-points-v2š’opp-500000000¥Íe¬ 'À’opp-560000000¥!`ì¬ L¸’opp-612000000¥$za¬ •ö’opp-682000000¥(¦~€¬ ÷ž’opp-752000000¥,Òœ¬ YF’ opp-822000000¥0þ¹€¬ ºî’ opp-875000000¥4'pÀ¬ ëÂ’ opp-927000000¥7@åÀ¬ 5’ opp-980000000¥:i�¬ ~>’ opp-1050000000¥>•º€¬ ßæ’opp-1120000000¥BÁج )$’opp-1155000000¥D׿À¬ ŠÌ’opp-1190000000¥Fíõ€¬ Ô ’opp-1260000000¥K¬~ð’opp-1330000000¥OF0€¬)Ö’opp-1400000000¥SrN¬¼R’opp-table-cluster0operating-points-v2š’opp-500000000¥Íe¬ 'Àºopp-774000000¥."M€¬ L¸ºopp-875000000¥4'pÀ¬ ®`ºopp-975000000¥:QÀ¬ ºopp-1075000000¥@2À¬ q°º opp-1175000000¥F À¬ ÓXº opp-1275000000¥KþôÀ¬ 5º opp-1375000000¥QôÕÀ¬ –¨º opp-1500000000¥Yh/¬ ºº opp-1618000000¥`p¸€¬ Yøºopp-1666000000¥cM$€¬ » ºopp-1733000000¥gK{@¬Hºopp-1800000000¥kIÒ¬~ðºopp-1866000000¥o8怬ùºopp-1933000000¥s7=@¬Zªºopp-2000000000¥w5”¬¼Rºopp-table-cluster1operating-points-v2š’"opp-774000000¥."M€¬ L¸ºopp-835000000¥1ÅÀ¬ •öºopp-919000000¥6ÆÓÀ¬ ÷žºopp-1002000000¥;¹N€¬ YFºopp-1085000000¥@«É@¬ ÓXº opp-1169000000¥E­†@¬ 5º opp-1308000000¥Mö¬ ßæº opp-1419000000¥T”8À¬ Yøº opp-1530000000¥[1ò€¬ ìtº opp-1670000000¥cŠ-€¬—Zºopp-1733000000¥gK{@¬ùºopp-1796000000¥k ɬsºopp-1860000000¥nÝY¬Ô¼ºopp-1923000000¥rž¦À¬6dºopp-1986000000¥v_ô€¬°vºopp-2050000000¥z0„€¬ºcpus+cpu-mapcluster0core0Ècore1Ècore2Ècore3Ècore4Ècore5Ècore6Ècore7Ècpu@0Ìcpuarm,cortex-a55ØÜpsciêw5”krcpuintermediate~úT~'7€D@V€c€p@‚€�  ¯!’cpu@100Ìcpuarm,cortex-a55ØÜpsciêw5”krcpuintermediate~úT~'7€D@V€c€p@‚€�  ¯!’cpu@200Ìcpuarm,cortex-a55ØÜpsciêw5”krcpuintermediate~úT~'7€D@V€c€p@‚€�  ¯!’cpu@300Ìcpuarm,cortex-a55ØÜpsciêw5”krcpuintermediate~úT~'7€D@V€c€p@‚€�  ¯!’cpu@400Ìcpuarm,cortex-a55ØÜpsciêw5”krcpuintermediate~úT~'7€D@V€c€p@‚€�  ¯!’cpu@500Ìcpuarm,cortex-a55ØÜpsciêw5”krcpuintermediate~úT~'7€D@V€c€p@‚€�  ¯!’cpu@600Ìcpuarm,cortex-a76ØÜpsciêz0„€krcpuintermediate~"úO'#$7D@Vcp@‚�% ¯!’cpu@700Ìcpuarm,cortex-a76ØÜpsciêz0„€krcpuintermediate~"úO'#$7D@Vcp@‚�% ¯!’idle-states¼pscicpu-retention-larm,idle-stateÉàñ2d@’cpu-retention-barm,idle-stateÉàñ2dx’#cpu-off-larm,idle-stateÉàñdú4’cpu-off-barm,idle-stateÉàñdúl’$l2-cache0cache#9F@X�&/’ l2-cache1cache#9F@X�&/’%l3-cachecache#9F@X/’&fixed-factor-clock-13mfixed-factor-clock=k'JT_clk13m’4oscillator-26m fixed-clock=ꌺ€_clk26m’'oscillator-32k fixed-clock=ê€_clk32kopp-table-gpuoperating-points-v2’Mopp-299000000¥Ò`À¬ X”rÿopp-332000000¥Éë¬ ‰hrÿopp-366000000¥з€¬ º<rÿopp-400000000¥ׄ¬ Ò¦rÿopp-434000000¥ÞP€¬ zrÿopp-484000000¥ÙA¬ 4Nrÿopp-535000000¥ãsÀ¬ }Œrÿopp-586000000¥"í¦€¬ ®`rÿopp-637000000¥%÷Ù@¬ ß4rÿopp-690000000¥) �€¬ @Ürÿopp-743000000¥,IGÀ¬ Šrÿopp-796000000¥/qÿ¬ ëÂrÿopp-850000000¥2©ø€¬ 5rÿopp-900000000-3¥5¤é¬ øPrÏopp-900000000-4¥5¤é¬ Ç|ropp-900000000-5¥5¤é¬ –¨r opp-950000000-3¥8ŸÙ€¬ » rÏopp-950000000-4¥8ŸÙ€¬ Yøropp-950000000-5¥8ŸÙ€¬ øPr opp-1000000000-3¥;šÊ¬~ðrÏopp-1000000000-4¥;šÊ¬ ìtropp-1000000000-5¥;šÊ¬ Yør pmu-a55arm,cortex-a55-pmu ƒ(pmu-a76arm,cortex-a76-pmu ƒ)psci arm,psci-1.0ãsmctimerarm,armv8-timer @ƒ   soc+ simple-busŽ’interrupt-controller@c000000 arm,gic-v3™ª Á Ø   ƒ ’ppi-partitionsinterrupt-partition-0Ö’(interrupt-partition-1Ö’)syscon@c53a000mediatek,mt8186-mcusyssysconØ S =’syscon@10000000 mediatek,mt8186-topckgensysconØ=’+syscon@10001000#mediatek,mt8186-infracfg_aosysconØ=ß’,syscon@10003000mediatek,mt8186-pericfgsysconØ0’Hpinctrl@10005000mediatek,mt8186-pinctrl€ØP "$&*,°Bìiocfg0iocfg_ltiocfg_lmiocfg_lbiocfg_bliocfg_rbiocfg_rteintö*¹Áƒº™’*i2c0-default-pins’9pins-bus€%2èJi2c1-default-pins’:pins-bus‚�%2èJi2c2-default-pins’;pins-bus„ƒ%2èJi2c3-default-pins’<pins-bus†…%2èJi2c4-default-pins’=pins-busˆ‡%2èJi2c5-default-pins’>pins-busЉ%2èJi2c6-default-pins’?pins-busŒ‹WÉ2èJi2c7-default-pins’@pins-busŽ�%2èJi2c8-default-pins’Apins-bus��%2èJi2c9-default-pins’Epins-bus’‘WÉ2èJsyscon@10006000)mediatek,mt8186-scpsyssysconsimple-mfdØ`power-controller!mediatek,mt8186-power-controller+d’7power-domain@0Øk+rmfg00+dpower-domain@1Øx,+dpower-domain@2Ødpower-domain@3Ødpower-domain@17Øk++$rsubsys-csirx-top0subsys-csirx-top1dpower-domain@4Øk+,=rsys_ckref_ckdpower-domain@5Øk,B,?rsys_ckref_ckdpower-domain@18Øk+/+>raudioadspsubsys-adsp-bus+dpower-domain@19Ø+dpower-domain@20Øx,dpower-domain@16Øx,dpower-domain@6Ø0k+*++- ---Mrdispmdpsubsys-smi-infrasubsys-smi-commonsubsys-smi-galssubsys-smi-iommux,+dpower-domain@14Øk+). rvdec0larbx,dpower-domain@10Ø 8k++++ /+#+%6rcam0cam1cam2cam3galssubsys-cam-tmsubsys-cam-topx,+dpower-domain@12Ø dpower-domain@11Ø dpower-domain@7Øk0+&rgalssubsys-img-topx,+dpower-domain@8Ødpower-domain@9Ø (k+'1111Prsubsys-ipe-topsubsys-ipe-larb0subsys-ipe-larb1subsys-ipe-smisubsys-ipe-galsx,dpower-domain@13Ø k+$2rvenc0subsys-larbx,dpower-domain@15Øk+:33%rwpe0subsys-larb-cksubsys-larb-pclkx,dwatchdog@10007000mediatek,mt8186-wdtŠØpß’Fsyscon@1000c000"mediatek,mt8186-apmixedsyssysconØÀ=’pwrap@1000d000mediatek,mt8186-pwrapsysconØÐìpwrapƒÂk,, rspiwrapspmi@10015000*mediatek,mt8186-spmimediatek,mt8195-spmi ØP° ìpmifspmimstk,,+2(rpmif_sys_ckpmif_tmr_ckspmimst_clk_mux¢+2²+t ƒíñ Édisabledtimer@10017000,mediatek,mt8186-timermediatek,mt6765-timerØpƒÏk4mailbox@1022c000mediatek,mt8186-gceØ"À@k,rgceƒªÐ’Nscp@10500000mediatek,mt8186-scp ØP\�€ ìsramcfgƒÍ’aadsp@10680000mediatek,mt8186-dsp@Øh €h°hðìcfgsramsecbusk+/+>raudiodspadsp_bus¢+/+> ²'+EÜrxtxç56î7 Édisabledmailbox@10686100mediatek,mt8186-adsp-mboxÐØhaƒi’5mailbox@10687100mediatek,mt8186-adsp-mboxÐØhqƒj’6spi@11000000mediatek,mt8186-norØ k+3,O,c,drspisfaxiaxi_s¢+3²+Xƒ% Édisabledadc@11001000.mediatek,mt8186-auxadcmediatek,mt8173-auxadcØük,"rmainserial@11002000*mediatek,mt8186-uartmediatek,mt6577-uartØ ƒp k', rbaudbusÉokayserial@11003000*mediatek,mt8186-uartmediatek,mt6577-uartØ0ƒq k', rbaudbus Édisabledi2c@11007000mediatek,mt8186-i2c Øp ƒik8,' rmaindmaJ+Éokayê€default9i2c@11008000mediatek,mt8186-i2c Ø€ ƒjk8,' rmaindmaJ+Éokayê€&@default:i2c@11009000mediatek,mt8186-i2c Ø� €ƒkk8,' rmaindmaJ+Éokayê€&'default;i2c@1100f000mediatek,mt8186-i2c Øð €ƒlk8,' rmaindmaJ+Éokayê€default<i2c@11011000mediatek,mt8186-i2c Ø €€ƒmk8,' rmaindmaJ+Éokayê€default=i2c@11016000mediatek,mt8186-i2c Ø` ƒbk8,' rmaindmaJ+Éokayê€default>i2c@1100d000mediatek,mt8186-i2c ØÐ ƒck8,' rmaindmaJ+Éokayê€default?i2c@11004000mediatek,mt8186-i2c Ø@ €ƒnk8,' rmaindmaJ+Éokayê€default@i2c@11005000mediatek,mt8186-i2c ØP €€ƒok8,' rmaindmaJ+Éokayê€defaultAspi@1100a000(mediatek,mt8186-spimediatek,mt6765-spi+Ø ƒŠk+K+ ,rparent-clksel-clkspi-clk Édisabledthermal-sensor@1100b000mediatek,mt8186-lvtsذƒck, @,GBC$Slvts-calib-data-1lvts-calib-data-2d’esvs@1100bc00mediatek,mt8186-svsؼƒŽk, rmainGDB(Ssvs-calibration-datat-calibration-data@,zsvs_rstpwm@1100e0002mediatek,mt8186-disp-pwmmediatek,mt8183-disp-pwmØàƒ�†k+,4rmainmm Édisabledspi@11010000(mediatek,mt8186-spimediatek,mt6765-spi+؃‹k+K+ ,8rparent-clksel-clkspi-clk Édisabledspi@11012000(mediatek,mt8186-spimediatek,mt6765-spi+Ø ƒ‘k+K+ ,;rparent-clksel-clkspi-clk Édisabledspi@11013000(mediatek,mt8186-spimediatek,mt6765-spi+Ø0ƒ’k+K+ ,<rparent-clksel-clkspi-clk Édisabledspi@11014000(mediatek,mt8186-spimediatek,mt6765-spi+Ø@ƒtk+K+ ,Jrparent-clksel-clkspi-clk Édisabledspi@11015000(mediatek,mt8186-spimediatek,mt6765-spi+ØPƒuk+K+ ,Krparent-clksel-clkspi-clk Édisabledclock-controller@11017000mediatek,mt8186-imp_iic_wrapØp=’8serial@11018000*mediatek,mt8186-uartmediatek,mt6577-uartØ€ƒö k', rbaudbus Édisabledi2c@11019000mediatek,mt8186-i2c Ø� €ƒdk8 ,' rmaindmaJ+Éokayê€defaultEaudio-controller@11210000mediatek,mt8186-soundØ! Äk,,,6+++F+ + ++e++h+?+@+A+B+C+ƒ+„+…+†+‡+,'}raud_infra_clkmtkaif_26m_clktop_mux_audiotop_mux_audio_inttop_mainpll_d2_d4top_mux_aud_1top_apll1_cktop_mux_aud_2top_apll2_cktop_mux_aud_eng1top_apll1_d8top_mux_aud_eng2top_apll2_d8top_i2s0_m_seltop_i2s1_m_seltop_i2s2_m_seltop_i2s4_m_seltop_tdm_m_seltop_apll12_div0top_apll12_div1top_apll12_div2top_apll12_div4top_apll12_div_tdmtop_mux_audio_htop_clk26m_clkƒ©‘x,¥+@F zaudiosys Édisabledusb@11201000#mediatek,mt8186-mtu3mediatek,mtu3 Ø -ÿ > ìmacippc(k+,=,3,,>$rsys_ckref_ckmcu_ckdma_ckxhci_ckƒ/·Gî7+’¼ ÊH  Édisabledusb@11200000'mediatek,mt8186-xhcimediatek,mtk-xhciØ ìmac(k+,=,3,,>$rsys_ckref_ckmcu_ckdma_ckxhci_ckƒ& Édisabledmmc@11230000(mediatek,mt8186-mmcmediatek,mt8183-mmc Ø#Í k+ ,,U,rsourcehclksource_cgcryptoƒd¢+ ² Édisabledmmc@11240000(mediatek,mt8186-mmcmediatek,mt8183-mmc Ø$Ék+,,Vrsourcehclksource_cgƒe¢+²+o Édisabledusb@11281000#mediatek,mt8186-mtu3mediatek,mtu3 Ø(-ÿ(> ìmacippc$k,B,?,7',@$rsys_ckref_ckmcu_ckdma_ckxhci_ckƒK·IJî7+’¼ ÊH$ Édisabledusb@11280000'mediatek,mt8186-xhcimediatek,mtk-xhciØ(ìmac$k,B,?,7',@$rsys_ckref_ckmcu_ckdma_ckxhci_ckƒD Édisabledt-phy@11c80000.mediatek,mt8186-tphymediatek,generic-tphy-v2+’ÈÉokayusb-phy@0Øk'rrefá’Iusb-phy@700Ø k'rrefá’Jt-phy@11ca0000.mediatek,mt8186-tphymediatek,generic-tphy-v2+’ÊÉokayusb-phy@0Øk'rrefáì’Gefuse@11cb0000%mediatek,mt8186-efusemediatek,efuseØË+lvts1-calib@1ccØÌ’Blvts2-calib@2f8Øø’Ccalib@550ØPP’Dgpu-speedbin@59cØœü’Lsocinfo-data1@7a0Ø dsi-phy@11cc0000mediatek,mt8183-mipi-txØÌk'=á _mipi_tx0_pll Édisabled’Qclock-controller@13000000mediatek,mt8186-mfgsysØ=’Kgpu@13040000&mediatek,mt8186-maliarm,mali-bifrostØ@kK0ƒ jobmmugpuî77 core0core1 GL Sspeed-bin~MúO Édisabled’jsyscon@14000000mediatek,mt8186-mmsyssysconØ=ßçNN$N’-mutex@14001000mediatek,mt8186-disp-mutexØk-ƒ'$N<²³î7smi@14002000mediatek,mt8186-smi-commonØ  k----rapbsmigals0gals1î7’Osmi@14003000mediatek,mt8186-smi-larbØ0k--rapbsmiPaOî7’Rsmi@14004000mediatek,mt8186-smi-larbØ@k--rapbsmiPaOî7’Sovl@140050002mediatek,mt8186-disp-ovlmediatek,mt8192-disp-ovlØPk-ƒ)nP$NPî7ovl@140060008mediatek,mt8186-disp-ovl-2lmediatek,mt8192-disp-ovl-2lØ`k-ƒ*nP!$N`î7rdma@140070004mediatek,mt8186-disp-rdmamediatek,mt8183-disp-rdmaØpk-ƒ+nP"$Npî7color@140090006mediatek,mt8186-disp-colormediatek,mt8173-disp-colorØ�k- ƒ-$N€î7dpi@1400a000mediatek,mt8186-dpiØ k+;- rpixelenginepll¢+;²+jƒ5î7 Édisabledportendpointccorr@1400b0006mediatek,mt8186-disp-ccorrmediatek,mt8192-disp-ccorrذk-ƒ.$N°î7aal@1400c0002mediatek,mt8186-disp-aalmediatek,mt8183-disp-aalØÀk-ƒ0$NÀî7gamma@1400d0006mediatek,mt8186-disp-gammamediatek,mt8183-disp-gammaØÐk- ƒ1$NÐî7postmask@1400e000<mediatek,mt8186-disp-postmaskmediatek,mt8192-disp-postmaskØàk- ƒ2$Nàî7dither@1400f0008mediatek,mt8186-disp-dithermediatek,mt8183-disp-ditherØðk-ƒ3$Nðî7dsi@14013000mediatek,mt8186-dsiØ0k--Qrenginedigitalhsƒ7î7@-·Qudphy Édisabledportendpointiommu@14016000mediatek,mt8186-iommu-mmØ`k-rbclkƒ98RSTUVWXYZ[\]^_î7Ž’Prdma@1401f0004mediatek,mt8186-disp-rdmamediatek,mt8183-disp-rdmaØðk-ƒ4nP $Nðî7clock-controller@14020000mediatek,mt8186-wpesysØ=’3smi@14023000mediatek,mt8186-smi-larbØ0k33rapbsmiPaOî7’Wclock-controller@15020000mediatek,mt8186-imgsys1Ø=’0smi@1502e000mediatek,mt8186-smi-larbØàk00rapbsmiP aOî7’Xclock-controller@15820000mediatek,mt8186-imgsys2Ø‚=’`smi@1582e000mediatek,mt8186-smi-larbØ‚àk0`rapbsmiP aOî7’Yvideo-decoder@16000000mediatek,mt8186-vcodec-decØ’+Ž@ÿðnP€›avideo-codec@16025000mediatek,mtk-vcodec-coreØPƒW`nP€P�P‚PƒP„P…P†P‡PˆP‰PŠP‹ k+)..+U%rvdec-selvdec-soc-vdecvdecvdec-top¢+)²+Uî7smi@1602e000mediatek,mt8186-smi-larbØàk..rapbsmiPaOî7’Uclock-controller@1602f000mediatek,mt8186-vdecsysØð=’.clock-controller@17000000mediatek,mt8186-vencsysØ=’2smi@17010000mediatek,mt8186-smi-larbØk22rapbsmiPaOî7 ’Vvideo-encoder@170200006mediatek,mt8186-vcodec-encmediatek,mt8183-vcodec-encØ ƒóHnPàPáPâPãPäPåPæPçPèk2 rvenc_sel¢+$²+Uî7 ›ajpeg-encoder@17030000+mediatek,mt8186-jpgencmediatek,mtk-jpgenc؃õk2rjpgenc nPéPêPëPìî7 clock-controller@1a000000mediatek,mt8186-camsysØ=’/smi@1a001000mediatek,mt8186-smi-larbØk//rapbsmiP aOî7 ’Zsmi@1a002000mediatek,mt8186-smi-larbØ k//rapbsmiPaOî7 ’[smi@1a00f000mediatek,mt8186-smi-larbØðk/brapbsmiPaOî7 ’\smi@1a010000mediatek,mt8186-smi-larbØk/crapbsmiPaOî7 ’]clock-controller@1a04f000mediatek,mt8186-camsys_rawaØð=’bclock-controller@1a06f000mediatek,mt8186-camsys_rawbØð=’cclock-controller@1b000000mediatek,mt8186-mdpsysØ=’dsmi@1b002000mediatek,mt8186-smi-larbØ kddrapbsmiPaOî7’Tclock-controller@1c000000mediatek,mt8186-ipesysØ=’1smi@1c00f000mediatek,mt8186-smi-larbØðk11rapbsmiPaOî7 ’_smi@1c10f000mediatek,mt8186-smi-larbØðk11rapbsmiPaOî7 ’^thermal-zonescpu-little0-thermal¨è¶–Ìetripstrip-alert0ÜLèÐEpassive’ftrip-alert1ÜsèÐEhottrip-crit܆ è Ecriticalcooling-mapsmap0ófHøÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcpu-little1-thermal¨è¶–Ìetripstrip-alert0ÜLèÐEpassive’gtrip-alert1ÜsèÐEhottrip-crit܆ è Ecriticalcooling-mapsmap0ógHøÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcpu-little2-thermal¨è¶–Ìetripstrip-alert0ÜLèÐEpassive’htrip-alert1ÜsèÐEhottrip-crit܆ è Ecriticalcooling-mapsmap0óhHøÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcam-thermal¨è¶úÌetripstrip-alert0ÜLèÐEpassivetrip-alert1ÜsèÐEhottrip-crit܆ è Ecriticalnna-thermal¨è¶úÌetripstrip-alert0ÜLèÐEpassivetrip-alert1ÜsèÐEhottrip-crit܆ è Ecriticaladsp-thermal¨è¶úÌetripstrip-alert0ÜLèÐEpassivetrip-alert1ÜsèÐEhottrip-crit܆ è Ecriticalgpu-thermal¨è¶úÌetripstrip-alert0ÜLèÐEpassive’itrip-alert1ÜsèÐEhottrip-crit܆ è Ecriticalcooling-mapsmap0ói øjÿÿÿÿÿÿÿÿcpu-big0-thermal¨è¶dÌetripstrip-alert0ÜLèÐEpassive’ktrip-alert1ÜsèÐEhottrip-crit܆ è Ecriticalcooling-mapsmap0ókøÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿcpu-big1-thermal¨è¶dÌetripstrip-alert0ÜLèÐEpassive’ltrip-alert1ÜsèÐEhottrip-crit܆ è Ecriticalcooling-mapsmap0óløÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿchosenserial0:921600n8memory@40000000ÌmemoryØ@€ compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typeovl0ovl-2l0rdma0rdma1serial0clocksclock-namesoperating-points-v2phandleopp-sharedopp-hzopp-microvoltrequired-oppscpudevice_typeregenable-methodclock-frequencydynamic-power-coefficientcapacity-dmips-mhzcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellsmediatek,ccientry-methodarm,psci-suspend-paramlocal-timer-stopentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unified#clock-cellsclock-divclock-multclock-output-namesopp-supported-hwinterruptsdma-ranges#interrupt-cells#redistributor-regionsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangespinmuxbias-disabledrive-strength-microampinput-enablebias-pull-up#power-domain-cellsmediatek,infracfgmediatek,disable-extrstassigned-clocksassigned-clock-parentsstatus#mbox-cellsmbox-namesmboxespower-domains#io-channel-cellspinctrl-namespinctrl-0i2c-scl-internal-delay-nsresetsnvmem-cellsnvmem-cell-names#thermal-sensor-cellsreset-names#pwm-cellsmediatek,apmixedsysmediatek,topckgenphyswakeup-sourcemediatek,syscon-wakeup#phy-cellsmediatek,discthbitsinterrupt-namespower-domain-namesmediatek,gce-client-regmediatek,gce-eventsmediatek,larb-idmediatek,smiiommusphy-namesmediatek,larbs#iommu-cellsmediatek,scppolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicestdout-path