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‰hopp-320000000ÄÐË ¡Òopp-340000000ÄCýË º<opp-360000000Äu*Ë Ò¦opp-380000000ĦWË ëopp-400000000ÄׄË zopp-420000000Ä±Ë äopp-460000000Äk Ë L¸opp-500000000ÄÍeË }Œopp-540000000Ä /¿Ë ®`opp-580000000Ä"’Ë ß4opp-620000000Ä$ôsË opp-653000000Ä&ëý@Ë YFopp-698000000Ä)š¢€Ë ºîopp-743000000Ä,IGÀË –opp-800000000Ä/¯Ë –¨pmu-a53arm,cortex-a53-pmu '(pmu-a73arm,cortex-a73-pmu ')psci arm,psci-1.05smcfixed-factor-clock-13mfixed-factor-clockŠç*—¡¬clk13m¼5oscillator fixed-clockŠ¿Œº€¬clk26m¼*timerarm,armv8-timer '@   soc+ simple-busÏefuse@8000000%mediatek,mt8183-efusemediatek,efuse*+ Ödisabledinterrupt-controller@c000000 arm,gic-v3Ý 'îP*   @ A B  ¼'ppi-partitionsinterrupt-partition-0¼(interrupt-partition-1¼)syscon@c530000mediatek,mt8183-mcucfgsyscon* Sмinterrupt-controller@c530a80.mediatek,mt8183-sysirqmediatek,mt6577-sysirqîÝ '* S €P¼cpu-debug@d410000&arm,coresight-cpu-debugarm,primecell* Aç+. îapb_pclkcpu-debug@d510000&arm,coresight-cpu-debugarm,primecell* Qç+. îapb_pclkcpu-debug@d610000&arm,coresight-cpu-debugarm,primecell* aç+. îapb_pclkcpu-debug@d710000&arm,coresight-cpu-debugarm,primecell* qç+. îapb_pclkcpu-debug@d810000&arm,coresight-cpu-debugarm,primecell* �ç+. îapb_pclkcpu-debug@d910000&arm,coresight-cpu-debugarm,primecell* ‘ç+. îapb_pclkcpu-debug@da10000&arm,coresight-cpu-debugarm,primecell* ¡ç+. îapb_pclkcpu-debug@db10000&arm,coresight-cpu-debugarm,primecell* ±ç+. îapb_pclksyscon@10000000 mediatek,mt8183-topckgensyscon*мsyscon@10001000 mediatek,mt8183-infracfgsyscon*Š ¼+syscon@10003000mediatek,mt8183-pericfgsyscon*0мQpinctrl@10005000mediatek,mt8183-pinctrl *PòèçéÓÒÅó°Diocfg0iocfg1iocfg2iocfg3iocfg4iocfg5iocfg6iocfg7iocfg8eint#3?,Àî ±Ý¼,i2c0¼=pins_i2cKRSRi2c1¼Ipins_i2cKQTRi2c2¼?pins_i2cKghRi2c3¼Gpins_i2cK23Ri2c4¼>pins_i2cKijRi2c5¼Lpins_i2cK01Rspi0¼@pins_spiKUVWXgmmc0default¼Tpins_cmd_dat$K{€}„~�‚zt�pins_clkK|Žpins_rstK…�mmc0¼Upins_cmd_dat$K{€}„~�‚zt� �epins_clkK|� Žfpins_dsKƒ� Žfpins_rstK…� �mmc1default¼Xpins_cmd_datK "!t�pins_clkKtŽpins_pmuK²¦¬mmc1¼Ypins_cmd_datK "!�t�epins_clkK�Žftspi1¼Hpins_spiK¡¢£¤gspi2¼Jpins_spiK^gspi3¼Kpins_spiKgspi4¼Mpins_spiKgspi5¼Npins_spiK gpwm1¼Fpins_pwmKZsyscon@10006000)mediatek,mt8183-scpsyssysconsimple-mfd*`power-controller!mediatek,mt8183-power-controller+¸¼Epower-domain@0*ç +/+7îaudioaudio1audio2¸power-domain@1*Ì+¸power-domain@2*+¸power-domain@3*+¸Þ-power-domain@4*¸power-domain@5*¸power-domain@6*Ì+¸power-domain@7*Xç.......... 5îmmmm-0mm-1mm-2mm-3mm-4mm-5mm-6mm-7mm-8mm-9Ì+ì/+¸power-domain@8*@ç00 00000.îcamcam-0cam-1cam-2cam-3cam-4cam-5cam-6Ì+ì/¸power-domain@9* ç"1 1îispisp-0isp-1Ì+ì/¸power-domain@10* ì/¸power-domain@11* ì/¸power-domain@12* @ç&#222222-îvpuvpu1vpu-0vpu-1vpu-2vpu-3vpu-4vpu-5Ì+ì/+¸power-domain@13* ç$îvpu2Ì+¸power-domain@14*ç%îvpu3Ì+¸watchdog@10007000mediatek,mt8183-wdt*p ¼Rsyscon@1000c000"mediatek,mt8183-apmixedsyssyscon*ÀмBpwrap@1000d000mediatek,mt8183-pwrap*Ðpwrap ¹ç)+ îspiwrappmicmediatek,mt6358îÝ ù,¶adcmediatek,mt6358-auxadc audio-codecmediatek,mt6358-soundregulatorsmediatek,mt6358-regulatorbuck_vdram12vdram1A¡ YÚLq0Ô†¢¶buck_vcore2vcoreA¡ Y½¶qj†È¢¶buck_vpa2vpaA¡ Y7±ÐqÃP†ú¶buck_vproc112vproc11A¡ Y½¶qj†È¢¶¼&buck_vproc122vproc12A¡ Y½¶qj†È¢¶¼buck_vgpu2vgpuA ‰hY » qj†È¶Î3冠¼-buck_vs22vs2A¡ YÚLq0Ô†¢buck_vmodem2vmodemA¡ Y½¶qj†„¢¶buck_vs12vs1AB@Y'{lq0Ô†¢ldo_vdram22vdram2A 'ÀYw@† äldo_vsim12vsim1Að Y/M`†ldo_vibr2vibrAO€Y2Z †<ldo_vrf122vrf12AO€YO€†xldo_vio182vio18Aw@Yw@† Œ¢¼Wldo_vusb2vusbA-ÆÀY/M`†¢ldo_vcamio2vcamioAw@Yw@†Eldo_vcamd2vcamdA » Yw@†Eldo_vcn182vcn18Aw@Yw@†ldo_vfe282vfe28A*¹€Y*¹€†ldo_vsram_proc11 2vsram_proc11A¡ Y½¶qj†ð¢ldo_vcn282vcn28A*¹€Y*¹€†ldo_vsram_others 2vsram_othersA¡ Y½¶qj†ð¢ldo_vsram_gpu 2vsram_gpuA øPYB@qj†ðÎ-冠¼3ldo_vxo222vxo22A!‘ÀY!‘À†x¢ldo_vefuse2vefuseAð Yýà†ldo_vaux182vaux18Aw@Yw@†ldo_vmch2vmchA,@ Y2Z †<¼Zldo_vbif282vbif28A*¹€Y*¹€†ldo_vsram_proc12 2vsram_proc12A¡ Y½¶qj†ð¢ldo_vcama12vcama1Aw@Y-ÆÀ†Eldo_vemc2vemcA,@ Y2Z †<¼Vldo_vio282vio28A*¹€Y*¹€†ldo_va122va12AO€YO€†¢ldo_vrf182vrf18Aw@Yw@†xldo_vcn332vcn33A2Z Y5gà†ldo_vcama22vcama2Aw@Y-ÆÀ†Eldo_vmc2vmcAw@Y2Z †<¼[ldo_vldo282vldo28A*¹€Y-ÆÀ†ldo_vaud282vaud28A*¹€Y*¹€†ldo_vsim22vsim2Að Y/M`†rtcmediatek,mt6358-rtckeysmediatek,mt6358-keyspowerthomefkeyboard@10010000.mediatek,mt8183-keypadmediatek,mt6779-keypad* ºç*îkpd Ödisabledscp@10500000mediatek,mt8183-scp *P\�€ sramcfg ®ç+îmain4 Ödisabled¼btimer@10017000,mediatek,mt8183-timermediatek,mt6765-timer*p Èç5iommu@10205000mediatek,mt8183-m4u* P ¦-6789:;<<¼`mailbox@10238000mediatek,mt8183-gce*#€@ ¢Iç+îgce¼_auxadc@11001000.mediatek,mt8183-auxadcmediatek,mt8173-auxadc*ç+#îmain Öokay¼Aserial@11002000*mediatek,mt8183-uartmediatek,mt6577-uart*  [ ç*+ îbaudbusÖokayserial@11003000*mediatek,mt8183-uartmediatek,mt6577-uart*0 \ ç*+ îbaudbus Ödisabledserial@11004000*mediatek,mt8183-uartmediatek,mt6577-uart*@ ] ç*+ îbaudbus Ödisabledi2c@11005000mediatek,mt8183-i2c *P€ Wç+W+* îmaindma—+ Ödisabledi2c@11007000mediatek,mt8183-i2c *p€€ Qç+ +* îmaindma—+ÖokayUdefaultc=¿† i2c@11008000mediatek,mt8183-i2c *€€ Rç+ +*+G îmaindmaarb—+ÖokayUdefaultc>¿B@i2c@11009000mediatek,mt8183-i2c *�€€ Sç+ +*+I îmaindmaarb—+ÖokayUdefaultc?¿† spi@1100a000mediatek,mt8183-spi+*  xç6+îparent-clksel-clkspi-clkÖokayUdefaultc@mthermal-sensor@1100b000�mediatek,mt8183-thermal*° ç+ +# îthermauxadc—+ LžA®BÂCÎcalibration-data¼esvs@1100bc00mediatek,mt8183-svs*¼ ç+ îmainÂDC(Îsvs-calibration-datat-calibration-datapwm@1100e000mediatek,mt8183-disp-pwm*à €ßEíç+5îmainmmpwm@11006000mediatek,mt8183-pwm*`í0ç++++++îtopmainpwm1pwm2pwm3pwm4ÖokaycFUdefaulti2c@1100f000mediatek,mt8183-i2c *ð€ Tç+ +* îmaindma—+ÖokayUdefaultcG¿† spi@11010000mediatek,mt8183-spi+* |ç6+8îparent-clksel-clkspi-clkÖokayUdefaultcHmi2c@11011000mediatek,mt8183-i2c *€€ Uç+9+* îmaindma—+ÖokayUdefaultcI¿† spi@11012000mediatek,mt8183-spi+*  �ç6+;îparent-clksel-clkspi-clkÖokayUdefaultcJmspi@11013000mediatek,mt8183-spi+*0 ‚ç6+<îparent-clksel-clkspi-clkÖokayUdefaultcKmi2c@11014000mediatek,mt8183-i2c *@€€ ƒç+H+*+G îmaindmaarb—+ Ödisabledi2c@11015000mediatek,mt8183-i2c *P€ „ç+J+*+I îmaindmaarb—+ Ödisabledi2c@11016000mediatek,mt8183-i2c *`€ Vç+D+*+E îmaindmaarb—+ÖokayUdefaultcL¿B@i2c@11017000mediatek,mt8183-i2c *p€€ …ç+F+*+E îmaindmaarb—+ Ödisabledspi@11018000mediatek,mt8183-spi+*€ †ç6+Kîparent-clksel-clkspi-clkÖokayUdefaultcMmspi@11019000mediatek,mt8183-spi+*� ‡ç6+Lîparent-clksel-clkspi-clkÖokayUdefaultcNmi2c@1101a000mediatek,mt8183-i2c * €€ Xç+b+* îmaindma—+ Ödisabledi2c@1101b000mediatek,mt8183-i2c *°€ Yç+c+* îmaindma—+ Ödisabledusb@11201000#mediatek,mt8183-mtu3mediatek,mtu3 * . > macippc HøOPç+=+Zîsys_ckref_ck ýQ e+Ï Ödisabledusb@11200000'mediatek,mt8183-xhcimediatek,mtk-xhci* mac Iç+=+Zîsys_ckref_ck Ödisabledaudio-controller@11220000 mediatek,mt8183-audiosyssyscon*"мSmt8183-afe-pcmmediatek,mt8183-audio ¡—R audiosysßEDçSSSSS SSSSS S S S SS+/+7  0HLKOtuvwxyz{|}~*wîaud_afe_clkaud_dac_clkaud_dac_predis_clkaud_adc_clkaud_adc_adda6_clkaud_apll22m_clkaud_apll24m_clkaud_apll1_tuner_clkaud_apll2_tuner_clkaud_i2s1_bclk_swaud_i2s2_bclk_swaud_i2s3_bclk_swaud_i2s4_bclk_swaud_tdm_clkaud_tml_clkaud_infra_clkmtkaif_26m_clktop_mux_audiotop_mux_aud_intbustop_syspll_d2_d4top_mux_aud_1top_apll1_cktop_mux_aud_2top_apll2_cktop_mux_aud_eng1top_apll1_d8top_mux_aud_eng2top_apll2_d8top_i2s0_m_seltop_i2s1_m_seltop_i2s2_m_seltop_i2s3_m_seltop_i2s4_m_seltop_i2s5_m_seltop_apll12_div0top_apll12_div1top_apll12_div2top_apll12_div3top_apll12_div4top_apll12_divbtop_clk26m_clkmmc@11230000mediatek,mt8183-mmc *#õ Mç++îsourcehclksource_cgÖokayUdefaultstate_uhscT U*4 ëÂBTcrƒ‹‘( V¬W¹ÉUàmmc@11240000mediatek,mt8183-mmc *$á Nç ++(îsourcehclksource_cgÖokayUdefaultstate_uhscX Y*4 ëÂîÿ '‹ Z¬[.àdsi-phy@11e50000mediatek,mt8183-mipi-tx*åçBŠD ¬mipi_tx0_pllÂ\Îcalibration-data¼aefuse@11f10000%mediatek,mt8183-efusemediatek,efuse*ñ+socinfo-data1@4c*Lsocinfo-data2@60*`calib@180*€ ¼Ccalib@190*� ¼\calib@580*€d¼Dt-phy@11f40000.mediatek,mt8183-tphymediatek,generic-tphy-v2+ÏôÖokayusb-phy@0*ç*îrefDOÖokay¼Ousb-phy@700* ç*îrefDÖokay¼Psyscon@13000000mediatek,mt8183-mfgcfgsyscon*ŠßE¼]gpu@13040000'mediatek,mt8183b-maliarm,mali-bifrost*@$ _jobmmugpuç]ßEEEocore0core1core2ú^‚-syscon@14000000mediatek,mt8183-mmsyssyscon*Š Ž__•_¼.dma-controller0@14001000mediatek,mt8183-mdp3-rdma*•_­ßEç. .Á` Ž__Èmdp3-rsz0@14003000mediatek,mt8183-mdp3-rsz*0•_0­ç.mdp3-rsz1@14004000mediatek,mt8183-mdp3-rsz*@•_@­ç.dma-controller@14005000mediatek,mt8183-mdp3-wrot*P•_P­!ßEç.Á`Èmdp3-wdma@14006000mediatek,mt8183-mdp3-wdma*`•_`­"ßEç.)Á`ovl@14008000mediatek,mt8183-disp-ovl*€ áßEç.Á`•_€ovl@14009000mediatek,mt8183-disp-ovl-2l*� âßEç.Á`•_�ovl@1400a000mediatek,mt8183-disp-ovl-2l*  ãßEç.Á`•_ rdma@1400b000mediatek,mt8183-disp-rdma*° äßEç.Á`Ó•_°rdma@1400c000mediatek,mt8183-disp-rdma*À åßEç.Á`Ó•_Àcolor@1400e0006mediatek,mt8183-disp-colormediatek,mt8173-disp-color*à çßEç.•_àccorr@1400f000mediatek,mt8183-disp-ccorr*ð èßEç.•_ðaal@14010000mediatek,mt8183-disp-aal* éßEç.•_gamma@14011000mediatek,mt8183-disp-gamma* êßEç.•_dither@14012000mediatek,mt8183-disp-dither*  ëßEç.•_ dsi@14014000mediatek,mt8183-dsi*@ ìßEç.. aîenginedigitalhs—.øaëdphy Ödisabledportendpointdpi@14015000mediatek,mt8183-dpi*P íßEç.".!Bîpixelenginepll Ödisabledportendpointmutex@14016000mediatek,mt8183-disp-mutex*` ÙßE­‚ƒ•_`larb@14017000mediatek,mt8183-smi-larb*pì/ç..ßEîapbsmi¼6smi@14019000mediatek,mt8183-smi-common*� ç....îapbsmigals0gals1ßE¼/mdp3-ccorr@1401c000mediatek,mt8183-mdp3-ccorr*À•_À­1ç.+syscon@15020000mediatek,mt8183-imgsyssyscon*м1larb@15021000mediatek,mt8183-smi-larb*ì/ç1 1 . îapbsmigalsßE ¼;larb@1502f000mediatek,mt8183-smi-larb*ðì/ç11.  îapbsmigalsßE ¼8syscon@16000000mediatek,mt8183-vdecsyssyscon*мcvideo-codec@16020000mediatek,mt8183-vcodec-dec°* 0@Phpx„(miscldtopcmadavpphwdhwqhwbhwg ú8Á` `!`"`#`$`%`&õbcßE çcîvdeclarb@16010000mediatek,mt8183-smi-larb*ì/çccîapbsmißE ¼7syscon@17000000mediatek,mt8183-vencsyssyscon*мdlarb@17010000mediatek,mt8183-smi-larb*ì/çddîapbsmißE ¼:jpeg-encoder@17030000+mediatek,mt8183-jpgencmediatek,mtk-jpgenc* ùÁ`…`†ßE çdîjpgencsyscon@19000000 mediatek,mt8183-ipu_connsyscon*м2syscon@19010000mediatek,mt8183-ipu_adlsyscon*Šsyscon@19180000!mediatek,mt8183-ipu_core0syscon*Šsyscon@19280000!mediatek,mt8183-ipu_core1syscon*(Šsyscon@1a000000mediatek,mt8183-camsyssyscon*м0larb@1a001000mediatek,mt8183-smi-larb*ì/ç00. îapbsmigalsßE¼<larb@1a002000mediatek,mt8183-smi-larb* ì/ç0 0 . îapbsmigalsßE¼9thermal-zonescpu-thermald)ô7eGˆtripstrip-point0Y  eÐEpassivetrip-point1Y8€eÐEpassive¼fcpu-critYÁ8eÐ Ecriticalcooling-mapsmap0pf0uÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ„ map1pf0uÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ„soc-thermal)èú7eGˆtripstrip-alertYLeÐEpassivetrip-critY† eÐ Ecriticalgpu-thermal)èú7eGˆtripstrip-alertYLeÐEpassivetrip-critY† eÐ Ecriticalmd1-thermal)èú7eGˆtripstrip-alertYLeÐEpassivetrip-critY† eÐ Ecriticalcpu-little-thermal)èú7eGˆtripstrip-alertYLeÐEpassivetrip-critY† eÐ Ecriticalcpu-big-thermal)èú7eGˆtripstrip-alertYLeÐEpassivetrip-critY† eÐ Ecriticaltsabb-thermal)èú7eGˆtripstrip-alertYLeÐEpassivetrip-critY† eÐ Ecriticalmemory@40000000memory*@€chosen‘serial0:921600n8reserved-memory+Ïmemory@50000000shared-dma-pool*P��¼4thermal-sensormurata,ncp03wf104¤w@®óp¹ÆA compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typei2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9i2c10i2c11ovl0ovl-2l0ovl-2l1rdma0rdma1serial0opp-sharedphandleopp-hzopp-microvoltrequired-oppsclocksclock-namesoperating-points-v2proc-supplycpudevice_typeregenable-methodcapacity-dmips-mhzcpu-idle-statesdynamic-power-coefficienti-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cache#cooling-cellsmediatek,ccientry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedinterrupts#clock-cellsclock-divclock-multclock-output-namesclock-frequencyrangesstatus#interrupt-cellsinterrupt-controlleraffinity#reset-cellsreg-namesgpio-controller#gpio-cellsgpio-rangespinmuxmediatek,pull-up-advbias-disableinput-enablebias-pull-upbias-pull-downdrive-strengthoutput-high#power-domain-cellsmediatek,infracfgdomain-supplymediatek,smiinterrupts-extended#io-channel-cellsmediatek,dmic-moderegulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-enable-ramp-delayregulator-always-onregulator-allowed-modesregulator-coupled-withregulator-coupled-max-spreadlinux,keycodeswakeup-sourcememory-regionmediatek,larbs#iommu-cells#mbox-cellspinctrl-namespinctrl-0mediatek,pad-select#thermal-sensor-cellsresetsmediatek,auxadcmediatek,apmixedsysnvmem-cellsnvmem-cell-namespower-domains#pwm-cellsphysmediatek,syscon-wakeupreset-namespinctrl-1bus-widthmax-frequencycap-mmc-highspeedmmc-hs200-1_8vmmc-hs400-1_8vcap-mmc-hw-resetno-sdiono-sdhs400-ds-delayvmmc-supplyvqmmc-supplyassigned-clocksassigned-clock-parentsnon-removablecap-sd-highspeedsd-uhs-sdr50sd-uhs-sdr104cap-sdio-irqno-mmckeep-power-in-suspend#phy-cellsmediatek,discthinterrupt-namespower-domain-namesmali-supplymboxesmediatek,gce-client-regmediatek,gce-eventsiommus#dma-cellsmediatek,rdma-fifo-sizephy-namesmediatek,scpmediatek,vdecsyspolling-delay-passivepolling-delaythermal-sensorssustainable-powertemperaturehysteresistripcooling-devicecontributionstdout-pathno-mappullup-uvpullup-ohmpulldown-ohmio-channels