Ð þíä8Ù(( ÷Øð ,radxa,rock3arockchip,rk35687Radxa ROCK3 Model Aaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000�/serial@fe650000‰/serial@fe660000‘/serial@fe670000™/serial@fe680000¡/serial@fe690000©/serial@fe6a0000±/serial@fe6b0000¹/serial@fe6c0000Á/serial@fe6d0000É/spi@fe610000Î/spi@fe620000Ó/spi@fe630000Ø/spi@fe640000Ý/ethernet@fe010000ç/mmc@fe2b0000ì/mmc@fe310000cpus cpu@0ñcpu,arm,cortex-a55ýpsci%9D cpu@100ñcpu,arm,cortex-a55ýpsci%9D cpu@200ñcpu,arm,cortex-a55ýpsci%9D cpu@300ñcpu,arm,cortex-a55ýpsci%9D opp-table-0,operating-points-v2LDopp-408000000WQ– ^ »  » Œ0lœ@opp-600000000W#ÃF ^ »  » Œ0opp-816000000W0£, ^ »  » Œ0}opp-1104000000WAÍ´ ^ »  » Œ0opp-1416000000WTfr ^ »  » Œ0opp-1608000000W_Ø" ^à˜à˜Œ0opp-1800000000WkIÒ ^��Œ0opp-1992000000Wv»‚ ^Œ0Œ0Œ0display-subsystem,rockchip,display-subsystem‰firmwarescmi ,arm,scmi-smc�‚š protocol@14ý Dopp-table-1,operating-points-v2DFopp-200000000W ëÂ^ –¨opp-300000000Wá£^ –¨opp-400000000Wׄ^ –¨opp-600000000W#ÃF^ –¨opp-700000000W)¹'^ » opp-800000000W/¯^B@hdmi-sound,simple-audio-card­HDMIÄi2sÝ÷okaysimple-audio-card,codecþsimple-audio-card,cpuþpmu,arm,cortex-a55-pmu0äåæç psci ,arm,psci-1.0smctimer,arm,armv8-timer0   &xin24m ,fixed-clock=n6Mxin24m Dxin32k ,fixed-clock=€Mxin32k` jdefault sram@10f000 ,mmio-sramýð xðsram@0,arm,scmi-shmemýDsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü@›œ�satapmaliverxoob _‹ �sata-phyš¬ ÷disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü€ ¡¢satapmaliverxoob `‹ �sata-phyš¬ ÷disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3ýüÀ@ ©¦§¥ref_clksuspend_clkbus_clkºotg Âutmi_wide¬Ë”Ò÷okay ‹�usb2-phyusb3-phyëusb@fd000000,rockchip,rk3568-dwc3snps,dwc3ýý@ ª©ª¨ref_clksuspend_clkbus_clkºhost ‹�usb2-phyusb3-phy Âutmi_wide¬Ë•Ò÷okayinterrupt-controller@fd400000 ,arm,gic-v3 ýý@ýF  òýA"(-Dusb@fd800000 ,generic-ehciýý€ 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pwmpclk`)jdefault  ÷disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×  0 pwmpclk`*jdefault  ÷disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýý×0 0 pwmpclk`+jdefault  ÷disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdýýÙpower-controller!,rockchip,rk3568-power-controller Dpower-domain@7ý*,power-domain@8ýÌÍ *-./power-domain@9ý ÚÛÜ *012power-domain@10ý ñò*345678power-domain@11ý í*9power-domain@13ý *:power-domain@14ý *;<=power-domain@15ý *>?@ABCDEgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrostýýæ@$()' 1jobmmugpugpubus%F¬÷okayAGD›video-codec@fdea0400,rockchip,rk3568-vpuýýê ‹îï aclkhclkMH¬ iommu@fdea0800,rockchip,rk3568-iommuýýê@ Š aclkifaceîï¬ TDHvideo-codec@fdee0000,rockchip,rk3568-vepuýýî @ýþ aclkhclkMI¬ iommu@fdee0800,rockchip,rk3568-iommuýýî@ ?ýþ aclkiface¬ TDImmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ@ d ÁÂŽ�biuciuciu-driveciu-samplealðÑ€Ëëzreset ÷disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20aýþ 1macirqeth_wake_irq@†‰‰ÇÃĉÈWstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refËì zstmmacethì†J–§KºLÍ÷okaylj†´‡×sY@ÖoutputãM îrgmii-idjdefault`NOPQRmdio,snps,dwmac-mdio ethernet-phy@0,ethernet-phy-ieee802.3-c22ýjdefault`S÷N †  TDMstmmac-axi-config%/?DJrx-queues-configODKqueue0tx-queues-configeDLqueue0vop@fe040000 ýþ0þ@{vopgamma-lut ”(ÝÞßàá%aclkhclkdclk_vp0dclk_vp1dclk_vp2MU¬ ì÷okay,rockchip,rk3568-vopÇßà´ports Dport@0ý endpoint@2ý…VD^port@1ý port@2ý iommu@fe043e00,rockchip,rk3568-iommu ýþ>þ? ”ÝÞ aclkifaceT÷okayDUdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ D pclkhclkèÚ�dphy‹W¬ zapbËì ÷disabledports port@0ýport@1ýdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsiýþ E pclkhclkéÚ�dphy‹X¬ zapbËì ÷disabledports port@0ýport@1ýhdmi@fe0a0000,rockchip,rk3568-dw-hdmiýþ  -(æç“(Úiahbisfrcecrefjdefault `YZ[¬ ôìì÷okay•\¥]Dports port@0ýendpoint…^DVport@1ýendpoint…_DÃqos@fe128000,rockchip,rk3568-qossysconýþ€ D,qos@fe138080,rockchip,rk3568-qossysconýþ€€ D;qos@fe138100,rockchip,rk3568-qossysconýþ� D<qos@fe138180,rockchip,rk3568-qossysconýþ�€ D=qos@fe148000,rockchip,rk3568-qossysconýþ€ D-qos@fe148080,rockchip,rk3568-qossysconýþ€€ D.qos@fe148100,rockchip,rk3568-qossysconýþ� D/qos@fe150000,rockchip,rk3568-qossysconýþ D9qos@fe158000,rockchip,rk3568-qossysconýþ€ D3qos@fe158100,rockchip,rk3568-qossysconýþ� D4qos@fe158180,rockchip,rk3568-qossysconýþ�€ D5qos@fe158200,rockchip,rk3568-qossysconýþ‚ D6qos@fe158280,rockchip,rk3568-qossysconýþ‚€ D7qos@fe158300,rockchip,rk3568-qossysconýþƒ D8qos@fe180000,rockchip,rk3568-qossysconýþ qos@fe190000,rockchip,rk3568-qossysconýþ D>qos@fe190280,rockchip,rk3568-qossysconýþ€ DBqos@fe190300,rockchip,rk3568-qossysconýþ DCqos@fe190380,rockchip,rk3568-qossysconýþ€ DDqos@fe190400,rockchip,rk3568-qossysconýþ DEqos@fe198000,rockchip,rk3568-qossysconýþ€ D:qos@fe1a8000,rockchip,rk3568-qossysconýþ€ D0qos@fe1a8080,rockchip,rk3568-qossysconýþ€€ D1qos@fe1a8100,rockchip,rk3568-qossysconýþ� D2pcie@fe260000,rockchip,rk3568-pcie0ýÀ@þ&?{dbiapbconfig<KJIHG1syspmcmsilegacyerrµ(�‚ƒ„…$aclk_mstaclk_slvaclk_dbipclkauxñpci¿`Ò````àñ&‹ �pcie-phy¬8x>ð>ð>ðË¡zpipe ÷okayjdefault`a T0blegacy-interrupt-controllerò HD`mmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ+@ b °±Š‹biuciuciu-driveciu-samplealðÑ€ËÔzreset÷okay@J ["djdefault`cdefo|gˆmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshcýþ,@ c ²³Œ�biuciuciu-driveciu-samplealðÑ€ËÖzreset ÷disabledspi@fe300000 ,rockchip,sfcýþ0@ exvclk_sfchclk_sfc`hjdefault ÷disabledmmc@fe310000,rockchip,rk3568-dwcmshcýþ1 Ç{}× ëÂn6(|zy{}corebusaxiblocktimer÷okay@l ë•jdefault`ijkl|ˆi2s@fe400000,rockchip,rk3568-i2s-tdmýþ@ 4Ç=A×FÏqFÏq?C9mclk_txmclk_rxhclkïm£txËPQ ztx-mrx-mìì÷okayDi2s@fe410000,rockchip,rk3568-i2s-tdmýþA 5ÇEI×FÏqFÏqGK:mclk_txmclk_rxhclkïmm£rxtxËRS ztx-mrx-mìjdefault`nopqì÷okay­DÅi2s@fe420000,rockchip,rk3568-i2s-tdmýþB 6ÇM×FÏqOO;mclk_txmclk_rxhclkïmm£txrxËTzmìjdefault`rstuì ÷disabledi2s@fe430000,rockchip,rk3568-i2s-tdmýþC 7SW<mclk_txmclk_rxhclkïmm£txrxËUV ztx-mrx-mìì ÷disabledpdm@fe440000,rockchip,rk3568-pdmýþD LZYpdm_clkpdm_hclkïm £rx`vwxyz{jdefaultËXzpdm-mì ÷disabledspdif@fe460000,rockchip,rk3568-spdifýþF f mclkhclk_\ïm£txjdefault`|ì ÷disableddma-controller@fe530000,arm,pl330arm,primecellýþS@ È  apb_pclkßD&dma-controller@fe550000,arm,pl330arm,primecellýþU@È  apb_pclkßDmi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþZ /HG i2cpclk`}jdefault  ÷disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ[ 0JI i2cpclk`~jdefault  ÷disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ\ 1LK i2cpclk`jdefault  ÷disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ] 2NM i2cpclk`€jdefault  ÷disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ^ 3PO i2cpclk`�jdefault ÷okayrtc@51,haoyu,hym8563ýQ"  Mrtcic_32koutjdefault`‚iwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtýþ` • tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiýþa gRQspiclkapb_pclkï&&£txrxjdefault `ƒ„…  ÷disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spiýþb hTSspiclkapb_pclkï&&£txrxjdefault `†‡ˆ  ÷disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spiýþc iVUspiclkapb_pclkï&&£txrxjdefault `‰Š‹  ÷disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spiýþd jXWspiclkapb_pclkï&&£txrxjdefault `Œ�Ž  ÷disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uartýþe ubaudclkapb_pclkï&&`�jdefaultô ÷disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartýþf v# baudclkapb_pclkï&&`�jdefaultô÷okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartýþg w'$baudclkapb_pclkï&&`‘jdefaultô ÷disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uartýþh x+(baudclkapb_pclkï&& `’jdefaultô ÷disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uartýþi y/,baudclkapb_pclkï& & `“jdefaultô ÷disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþj z30baudclkapb_pclkï& & `”jdefaultô ÷disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþk {74baudclkapb_pclkï&&`•jdefaultô ÷disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþl |;8baudclkapb_pclkï&&`–jdefaultô ÷disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþm }?<baudclkapb_pclkï&&`—jdefaultô ÷disabledthermal-zonescpu-thermalêd è ˜tripscpu_alert0 p *ÐøpassiveD™cpu_alert1 $ø *Ðøpassivecpu_crit s *Ð øcriticalcooling-mapsmap0 5™0 : ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermalê è ˜tripsgpu-threshold p *Ðøpassivegpu-target $ø *ÐøpassiveDšgpu-crit s *Ð øcriticalcooling-mapsmap0 5š :›ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcýþq sÇ×f@ ®`tsadcapb_pclkË�‚×ì Isjinitdefaultsleep`œ `� jœ t÷okay Š ¡D˜saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcýþr ]saradcapb_pclkË€ zsaradc-apb ¼÷okay Ξpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY pwmpclk`Ÿjdefault  ÷disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY pwmpclk` jdefault  ÷disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn ZY pwmpclk`¡jdefault  ÷disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn0ZY pwmpclk`¢jdefault  ÷disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ pwmpclk`£jdefault  ÷disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ pwmpclk`¤jdefault  ÷disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo ]\ pwmpclk`¥jdefault  ÷disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo0]\ pwmpclk`¦jdefault  ÷disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ pwmpclk`§jdefault  ÷disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ pwmpclk`¨jdefault  ÷disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp `_ pwmpclk`©jdefault  ÷disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp0`_ pwmpclk`ªjdefault  ÷disabledphy@fe830000,rockchip,rk3568-naneng-combphyýþƒ"} refapbpipeÇ"×õáËÇ Ú« ì¬ ÷okayDphy@fe840000,rockchip,rk3568-naneng-combphyýþ„%~ refapbpipeÇ%×õáËÉ Ú« ì­ ÷okayDphy@fe870000,rockchip,rk3568-csi-dphyýþ‡ypclk ˺zapbì ÷disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphyýþ… refpclkz ¬ zapbË» ÷disabledDWmipi-dphy@fe860000,rockchip,rk3568-dsi-dphyýþ† refpclk{ ¬ zapb˼ ÷disabledDXusb2phy@fe8a0000,rockchip,rk3568-usb2phyýþŠphyclkMclk_usbphy0_480m ‡ ® ÷okayDhost-port ÷okay ¯Dotg-port ÷okay °Dusb2phy@fe8b0000,rockchip,rk3568-usb2phyýþ‹phyclkMclk_usbphy1_480m ˆ ± ÷okayhost-port ÷okay ¯Dotg-port ÷okay ¯Dpinctrl,rockchip,rk3568-pinctrlì (² xgpio@fdd60000,rockchip,gpio-bankýýÖ !.  5 EòD"gpio@fe740000,rockchip,gpio-bankýþt "cd 5 EòDÍgpio@fe750000,rockchip,gpio-bankýþu #ef 5 Eògpio@fe760000,rockchip,gpio-bankýþv $gh 5 EòDTgpio@fe770000,rockchip,gpio-bankýþw %ij 5 Eòpcfg-pull-up QDµpcfg-pull-none ^D³pcfg-pull-none-drv-level-1 ^ kD·pcfg-pull-none-drv-level-2 ^ kD¶pcfg-pull-none-drv-level-3 ^ kDºpcfg-pull-up-drv-level-1 Q kD¹pcfg-pull-up-drv-level-2 Q kD´pcfg-pull-none-smt ^ zD¸acodecaudiopwmbt656bt1120camvcc_cam_en � ³DÎcan0can1can2cifclk32kclk32k-out0 �³D cpuebcedpdpemmcemmc-bus8€ � ´ ´´´´´´´Diemmc-clk �´Djemmc-cmd �´Dkemmc-datastrobe �³Dleth0eth1flashfspifspi-pins` �³³³³³³Dhgmac0gmac1gmac1m1-miim �³³DNgmac1m1-rx-bus20 �³³ ³DPgmac1m1-tx-bus20 �¶¶³DOgmac1m1-rgmii-clk �³·DQgmac1m1-rgmii-bus@ �³³¶¶DRgpuhdmitxhdmitxm0-cec �³D[hdmitx-scl �³DYhdmitx-sda �³DZi2c0i2c0-xfer � ¸ ¸D i2c1i2c1-xfer � ¸ ¸D}i2c2i2c2m0-xfer � ¸¸D~i2c3i2c3m1-xfer � ¸¸Di2c4i2c4m1-xfer � ¸ ¸D€i2c5i2c5m0-xfer � ¸ ¸D�i2s1i2s1m0-lrcktx �³Doi2s1m0-mclk �³D$i2s1m0-sclktx �³Dni2s1m0-sdi0 � ³Dpi2s1m0-sdo0 �³Dqi2s2i2s2m0-lrcktx �³Dsi2s2m0-sclktx �³Dri2s2m0-sdi �³Dti2s2m0-sdo �³Dui2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk �³Dvpdmm0-clk1 �³Dwpdmm0-sdi0 � ³Dxpdmm0-sdi1 � ³Dypdmm0-sdi2 � ³Dzpdmm0-sdi3 �³D{pmicpmic_int �µD#pmupwm0pwm0m0-pins �³D(pwm1pwm1m0-pins �³D)pwm2pwm2m0-pins �³D*pwm3pwm3-pins �³D+pwm4pwm4-pins �³DŸpwm5pwm5-pins �³D pwm6pwm6-pins �³D¡pwm7pwm7-pins �³D¢pwm8pwm8m0-pins � ³D£pwm9pwm9m0-pins � ³D¤pwm10pwm10m0-pins � ³D¥pwm11pwm11m0-pins �³D¦pwm12pwm12m0-pins �³D§pwm13pwm13m0-pins �³D¨pwm14pwm14m0-pins �³D©pwm15pwm15m0-pins �³Dªrefclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ �´´´´Dcsdmmc0-clk �´Ddsdmmc0-cmd �´Desdmmc0-det �µDfsdmmc1sdmmc2spdifspdifm0-tx �³D|spi0spi0m0-pins0 � ³³³D…spi0m0-cs0 �³Dƒspi0m0-cs1 �³D„spi1spi1m0-pins0 � ³³³Dˆspi1m0-cs0 �³D†spi1m0-cs1 �³D‡spi2spi2m0-pins0 �³³³D‹spi2m0-cs0 �³D‰spi2m0-cs1 �³DŠspi3spi3m0-pins0 � ³³ ³DŽspi3m0-cs0 �³DŒspi3m0-cs1 �³D�tsadctsadc-shutorg �³D�tsadc-pin �³Dœuart0uart0-xfer �µµD'uart1uart1m0-xfer � µ µD�uart2uart2m0-xfer �µµD�uart3uart3m0-xfer �µµD‘uart4uart4m0-xfer �µµD’uart5uart5m0-xfer �µµD“uart6uart6m0-xfer �µµD”uart7uart7m0-xfer �µµD•uart8uart8m0-xfer �µµD–uart9uart9m0-xfer �µµD—vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2displayvcc_mipi_en �³DÏetherneteth_phy_rst �³DShym8563hym8563-int �µD‚ledsled_user_en �³DÄpciepcie-enable-h �³DÇpcie-reset-h �³Dausbvcc5v0_usb_host_en �³DÉvcc5v0_usb_hub_en �³DËvcc5v0_usb_otg_en �³DÌsata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahciýü–—˜satapmaliverxoob ^‹ �sata-phyš¬ ÷disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconýýÇDÂqos@fe190080,rockchip,rk3568-qossysconýþ€ D?qos@fe190100,rockchip,rk3568-qossysconýþ D@qos@fe190200,rockchip,rk3568-qossysconýþ DAsyscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconýýË€D»phy@fe8c0000,rockchip,rk3568-pcie3-phyýþŒ &'wrefclk_mrefclk_npclk˾zphy �» ÷disabledD½pcie@fe270000,rockchip,rk3568-pcie µ(ˆ‰Š‹Œ$aclk_mstaclk_slvaclk_dbipclkauxñpci< Ÿž�œ1syspmcmsglegacyerr¿`Ò¼¼¼¼àñ&‹½ �pcie-phy¬0ýÀ@@þ'8x>ð~ð@>ð{dbiapbconfig˱zpipe ÷disabledlegacy-interrupt-controllerò �D¼pcie@fe280000,rockchip,rk3568-pcie µ(��‘’“$aclk_mstaclk_slvaclk_dbipclkauxñpci<¥¤£¢¡1syspmcmsglegacyerr¿`Ò¾¾¾¾àñ &‹½ �pcie-phy¬0ýÀ€@þ(¿8x>ð¾ð€>ð{dbiapbconfigËÁzpipe ÷disabledlegacy-interrupt-controllerò ¢D¾ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20aýþ*1macirqeth_wake_irq@‚……¸´µ…¹Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refË× zstmmaceth솿–§ÀºÁÍ ÷disabledmdio,snps,dwmac-mdio stmmac-axi-config%/?D¿rx-queues-configODÀqueue0tx-queues-configeDÁqueue0phy@fe820000,rockchip,rk3568-naneng-combphyýþ‚| refapbpipeÇ×õáËÅ Ú« ì ÷okayDchosen ®serial2:1500000n8hdmi-con,hdmi-connectorøaportendpoint…ÃD_leds ,gpio-ledsled-0 " ºheartbeat à Éheartbeatjdefault`Ärk809-sound,simple-audio-cardÄi2s ­Analog RK809Ýsimple-audio-card,cpuþÅsimple-audio-card,codecþÆvcc12v-dcin,regulator-fixed vcc12v_dcin%9DÈvcc3v3-pcie-regulator,regulator-fixed ß "jdefault`Ç vcc3v3_pcieK2Z c2Z �!Dbvcc3v3-sys,regulator-fixed vcc3v3_sys%9K2Z c2Z �ÈD%vcc5v0-sys,regulator-fixed vcc5v0_sys%9KLK@cLK@�ÈD!vcc5v0-usb,regulator-fixed vcc5v0_usb%9KLK@cLK@�ÈDÊvcc5v0-usb-host,regulator-fixed ß ò"jdefault`Évcc5v0_usb_hostKLK@cLK@�ÊD¯vcc5v0-usb-hub-regulator,regulator-fixed ß ò"jdefault`Ëvcc5v0_usb_hub%�Êvcc5v0-usb-otg-regulator,regulator-fixed ß ò"jdefault`Ìvcc5v0_usb_otgKLK@cLK@�ÊD°vcc-cam,regulator-fixed ß òÍ jdefault`Îvcc_camK2Z c2Z �%regulator-state-mem›vcc-mipi,regulator-fixed ß òTjdefault`Ï vcc_mipiK2Z c2Z �%regulator-state-mem› interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1device_typeregclocks#cooling-cellsenable-methodoperating-points-v2cpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendassigned-clock-parentsrockchip,system-power-controller#sound-dai-cellsvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-init-microvoltregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltmic-in-differentialdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsfifo-depthmax-frequencyreset-namessnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modereset-assert-usreset-deassert-usreset-gpiossnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointavdd-0v9-supplyavdd-1v8-supplybus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesvpcie3v3-supplybus-widthcap-sd-highspeedcd-gpiosdisable-wpsd-uhs-sdr50vmmc-supplyvqmmc-supplynon-removabledma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplyrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfstdout-pathfunctioncolorlinux,default-triggerenable-active-highgpio