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÷disabledi2s@fe430000,rockchip,rk3568-i2s-tdmýþC 7SW<mclk_txmclk_rxhclkºgg9txrxËUV Etx-mrx-mì ÷disabledpdm@fe440000,rockchip,rk3568-pdmýþD LZYpdm_clkpdm_hclkºg 9rx`pqrstujdefaultËXEpdm-m ÷disabledspdif@fe460000,rockchip,rk3568-spdifýþF f mclkhclk_\ºg9txjdefault`v ÷disableddma-controller@fe530000,arm,pl330arm,primecellýþS@ ^  apb_pclkuD%dma-controller@fe550000,arm,pl330arm,primecellýþU@^  apb_pclkuDgi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþZ /HG i2cpclk`wjdefault  ÷disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ[ 0JI i2cpclk`xjdefault ÷okay€defaulti2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ\ 1LK i2cpclk`yjdefault  ÷disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ] 2NM i2cpclk`zjdefault  ÷disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2cýþ^ 3PO i2cpclk`{jdefault ÷okayDTwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdtýþ` • tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spiýþa gRQspiclkapb_pclkº%%9txrxjdefault `|}~  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÷disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþk {74baudclkapb_pclkº%%`‘jdefault¿Ì ÷disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþl |;8baudclkapb_pclkº%%`’jdefault¿Ì ÷disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartýþm }?<baudclkapb_pclkº%%`“jdefault¿Ì ÷disabledthermal-zonescpu-thermalÎdäèò”tripscpu_alert0 p ÐøpassiveD•cpu_alert1 $ø Ðøpassivecpu_crit s Ð øcriticalcooling-mapsmap0 •0  ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermalÎäèò”tripsgpu-threshold p Ðøpassivegpu-target $ø ÐøpassiveD–gpu-crit s Ð øcriticalcooling-mapsmap0 – —ÿÿÿÿÿÿÿÿtsadc@fe710000,rockchip,rk3568-tsadcýþq sÇ×f@ ®`tsadcapb_pclkË�‚×ì -sjinitdefaultsleep`˜ D™ N˜ X÷okay n …D”saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcýþr ]saradcapb_pclkË€ Esaradc-apb  ÷okay ²D·pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY pwmpclk`šjdefaultÖ÷okayDÆpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþnZY pwmpclk`›jdefaultÖ÷okayDÅpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn ZY pwmpclk`œjdefaultÖ ÷disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþn0ZY pwmpclk`�jdefaultÖ ÷disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ pwmpclk`žjdefaultÖ ÷disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo]\ pwmpclk`ŸjdefaultÖ ÷disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo ]\ pwmpclk` jdefaultÖ ÷disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþo0]\ pwmpclk`¡jdefaultÖ ÷disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ pwmpclk`¢jdefaultÖ ÷disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp`_ pwmpclk`£jdefaultÖ ÷disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp `_ pwmpclk`¤jdefaultÖ ÷disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmýþp0`_ pwmpclk`¥jdefaultÖ ÷disabledphy@fe830000,rockchip,rk3568-naneng-combphyýþƒ"} refapbpipeÇ"×õáËÇ ¾¦ Ч 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D gpio@fe740000,rockchip,gpio-bankýþt "cd  gpio@fe750000,rockchip,gpio-bankýþu #ef  D\gpio@fe760000,rockchip,gpio-bankýþv $gh  Dºgpio@fe770000,rockchip,gpio-bankýþw %ij  D‹pcfg-pull-up *D®pcfg-pull-none 7D¬pcfg-pull-none-drv-level-1 7 DD°pcfg-pull-none-drv-level-2 7 DD¯pcfg-pull-none-drv-level-3 7 DD³pcfg-pull-up-drv-level-1 * DD²pcfg-pull-up-drv-level-2 * DD­pcfg-pull-none-smt 7 SD±pcfg-output-low hD´acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 s¬D cpuebcedpdpemmcemmc-rstnout s¬Dfemmc-bus8€ s ­ ­­­­­­­Dbemmc-clk s­Dcemmc-cmd s­Ddemmc-datastrobe s¬Deeth0eth1flashfspifspi-pins` s¬¬¬¬¬¬Dagmac0gmac1gpuhdmitxhdmitxm0-cec s¬DSi2c0i2c0-xfer s ± ±Di2c1i2c1-xfer s ± ±Dwi2c2i2c2m1-xfer s ± ±Dxi2c3i2c3m0-xfer s±±Dyi2c4i2c4m0-xfer s ± ±Dzi2c5i2c5m1-xfer s±±D{i2s1i2s1m0-lrcktx s¬Dii2s1m0-mclk s¬D!i2s1m0-sclktx s¬Dhi2s1m0-sdi0 s ¬Dji2s1m0-sdo0 s¬Dki2s2i2s2m0-lrcktx s¬Dmi2s2m0-sclktx s¬Dli2s2m0-sdi s¬Dni2s2m0-sdo s¬Doi2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk s¬Dppdmm0-clk1 s¬Dqpdmm0-sdi0 s ¬Drpdmm0-sdi1 s ¬Dspdmm0-sdi2 s ¬Dtpdmm0-sdi3 s¬Dupmicpmic-int-l s®D"pmupwm0pwm0m0-pins s¬D'pwm1pwm1m0-pins s¬D(pwm2pwm2m0-pins s¬D)pwm3pwm3-pins s¬D*pwm4pwm4-pins s¬Dšpwm5pwm5-pins s¬D›pwm6pwm6-pins s¬Dœpwm7pwm7-pins s¬D�pwm8pwm8m0-pins s ¬Džpwm9pwm9m0-pins s ¬DŸpwm10pwm10m0-pins s ¬D pwm11pwm11m0-pins s¬D¡pwm12pwm12m0-pins s¬D¢pwm13pwm13m0-pins s¬D£pwm14pwm14m0-pins s¬D¤pwm15pwm15m0-pins s¬D¥refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ s­­­­DXsdmmc0-clk s­DYsdmmc0-cmd s­DZsdmmc0-det s®D[sdmmc1sdmmc1-bus4@ s­­­­D]sdmmc1-clk s­D_sdmmc1-cmd s­D^sdmmc1-det s ®D`sdmmc2sdmmc2m0-bus4@ s­­­­DGsdmmc2m0-clk s­DIsdmmc2m0-cmd s­DHspdifspdifm0-tx s¬Dvspi0spi0m0-pins0 s ¬¬¬D~spi0m0-cs0 s¬D|spi0m0-cs1 s¬D}spi1spi1m0-pins0 s ¬¬¬D�spi1m0-cs0 s¬Dspi1m0-cs1 s¬D€spi2spi2m0-pins0 s¬¬¬D„spi2m0-cs0 s¬D‚spi2m0-cs1 s¬Dƒspi3spi3m0-pins0 s ¬¬ ¬D‡spi3m0-cs0 s¬D…spi3m0-cs1 s¬D†tsadctsadc-shutorg s¬D™tsadc-pin s¬D˜uart0uart0-xfer s®®D&uart1uart1m1-xfer s®®Dˆuart1m1-ctsn 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µ>button-up  º ùDPAD-UP µ button-x  º ùNORTH µ3button-a  º ùEAST µ1button-left  º ùDPAD-LEFT µ"button-r1  º  ùTR µ7button-r2  º  ùTR2 µ9button-right  º ùDPAD-RIGHT µ#button-y  º ùWEST µ4gpio-keys-vol ,gpio-keys 5`»jdefaultbutton-vol-down  º ùVOLUMEDOWN µrbutton-vol-up  º ùVOLUMEUP µsmux-controller ,gpio-mux @   JD¸hdmi-con,hdmi-connector�Tøcportendpointq¼DVgpio-leds ,gpio-leds`½jdefaultled-0 ] con qpower  led-1 ] qcharging   zled-2 ] coff qstatus  sound,simple-audio-card­anbernic_rk817 ‘¾Äi2s ¬‹ÝC ÊMicrophoneMic JackHeadphoneHeadphonesSpeakerInternal Speakersž äMICLMic JackHeadphonesHPOLHeadphonesHPORInternal SpeakersSpeaker Amp OUTLInternal SpeakersSpeaker Amp OUTRSpeaker Amp INLHPOLSpeaker Amp INRHPOR þInternal Speakerssimple-audio-card,codecþ¿simple-audio-card,cpuþÀsdio-pwrseq,mmc-pwrseq-simple¿ ext_clock`Ájdefault È 4‹DFaudio-amplifier,simple-audio-amplifier ±‹`Âjdefault @Speaker AmpD¾regulator-vcc3v3-lcd0,regulator-fixed Å  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interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0mmc1mmc2mmc3device_typeregclocks#cooling-cellsenable-methodoperating-points-v2cpu-supplyphandleopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesrockchip,grfassigned-clock-parents#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-init-microvoltregulator-ramp-delayregulator-initial-moderegulator-nameregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendfcs,suspend-voltage-selectorvin-supplydmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsfifo-depthmax-frequencyreset-namesbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablevmmc-supplyvqmmc-supplysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointddc-i2c-busbus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanescd-gpiosdisable-wpsd-uhs-sdr104mmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellspintctrl-namesuart-has-rtsctsdevice-wake-gpiosenable-gpioshost-wake-gpiospolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enableoutput-lowrockchip,pinsstdout-pathio-channelsabs-flatabs-fuzzabs-rangelinux,codeio-channel-nameskeyup-threshold-microvoltpoll-intervallabelpress-threshold-microvoltmux-controlssettle-time-usautorepeatmux-gpios#mux-control-cellscolordefault-statefunctionretain-state-suspendedsimple-audio-card,aux-devssimple-audio-card,hp-det-gpiosimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,pin-switchespost-power-on-delay-msreset-gpiossound-name-prefixenable-active-highpwm-namespwmspower-supply