Ð þíê¼8Þ´( Þ|2friendlyarm,nanopi-r4s-enterpriserockchip,rk3399 ++7FriendlyElec NanoPi R4S Enterprise Editionaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000„/serial@ff1a0000Œ/serial@ff1b0000”/serial@ff370000œ/mmc@fe310000¡/mmc@fe320000¦/mmc@fe330000cpus+cpu-mapcluster0core0«core1«core2«core3«cluster1core0«core1«cpu@0¯cpuarm,cortex-a53»¿psciÍåàçöd  4 ?cpu@1¯cpuarm,cortex-a53»¿psciÍåàçöd  4 ?cpu@2¯cpuarm,cortex-a53»¿psciÍåàçöd  4 ?cpu@3¯cpuarm,cortex-a53»¿psciÍåàçöd  4 ?cpu@100¯cpuarm,cortex-a72»¿psciÍà çö´  4?thermal-idleçG'Sôcpu@101¯cpuarm,cortex-a72»¿psciÍà çö´  4?thermal-idleçG'Sôidle-statescpscicpu-sleeparm,idle-statep�˜xSú©„? cluster-sleeparm,idle-statep�˜�Sô©Ð? memory-controllerrockchip,rk3399-dmcºÇà¨Ödmc_clk âdisabledpmu_a53arm,cortex-a53-pmuépmu_a72arm,cortex-a72-pmuépsci arm,psci-1.0Æsmctimerarm,armv8-timer@é   ôxin24m fixed-clock n6xin24m.?—pcie@f8000000rockchip,rk3399-pcie »øý;axi-baseapb-base¯pci+EVb àÅÄG Öaclkaclk-perfhclkpm0é123lsyslegacyclient|`��¬ ´,¹pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38Âúúà�ûàûà8Ê‚ƒ„…†�€(Ñcoremgmtmgmt-stickypipepmpclkaclkâokayÝç÷interrupt-controllerE?ethernet@fe300000rockchip,rk3399-gmac»þ0é lmacirq8àighfjÕfMÖstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac,ʉ Ñstmmaceth:GâokayRi¦yinput†default ”ž©rgmii² ½(ÆÏ! Ûmac-addressmdiosnps,dwmac-mdio+ethernet-phy@1» "é ì'üu0 "?mmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc»þ1@é@ðÑ€ àîMœ�Öbiuciuciu-driveciu-sample(,ÊyÑreset âdisabled3=N[q#|†default ”$%&Šmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc»þ2@éAðÑ€i͘ ë àÎLš›Öbiuciuciu-driveciu-sample(,ÊzÑresetâokay3=­ ¿'Ȇdefault”()*+ŠÓ,ß-mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1»þ3é ìiN˜ ëÂàNðÖclk_xinclk_ahbemmc_cardclock.´. ¹phy_arasan, âdisabled3|?šusb@fe380000 generic-ehci»þ8éàÈÉ/´0¹usbâokayusb@fe3a0000 generic-ohci»þ:éàÈÉ/´0¹usbâokayusb@fe3c0000 generic-ehci»þ<éàÊË1´2¹usbâokayusb@fe3e0000 generic-ohci»þ>é àÊË1´2¹usbâokaydebug@fe430000&arm,coresight-cpu-debugarm,primecell»þCàM Öapb_pclk«debug@fe432000&arm,coresight-cpu-debugarm,primecell»þC àM Öapb_pclk«debug@fe434000&arm,coresight-cpu-debugarm,primecell»þC@àM Öapb_pclk«debug@fe436000&arm,coresight-cpu-debugarm,primecell»þC`àM Öapb_pclk«debug@fe610000&arm,coresight-cpu-debugarm,primecell»þaàL Öapb_pclk«debug@fe710000&arm,coresight-cpu-debugarm,primecell»þqàL Öapb_pclk«usb@fe800000rockchip,rk3399-dwc3+Ã0à�ƒöøôùGÖref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkÊ% Ñusb3-otgâokayusb@fe800000 snps,dwc3»þ€éià�öƒÖrefbus_earlysuspend"host´34¹usb2-phyusb3-phy *utmi_wide3Kl…¦,âokayusb@fe900000rockchip,rk3399-dwc3+Ã0à‚„÷øôùGÖref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clkÊ& Ñusb3-otgâokayusb@fe900000 snps,dwc3»þ�énà‚÷„Örefbus_earlysuspend"host´56¹usb2-phyusb3-phy *utmi_wide3Kl…¦,âokaydp@fec00000rockchip,rk3399-cdn-dp»þÀé ir¡˜õá ë àru¡oÖcore-clkpclkspdifgrf´78, ÊHJýÑspdifdptxapbcore:È âdisabledportsport+endpoint@0»Ù9?ªendpoint@1»Ù:?¤interrupt-controller@fee00000 arm,gic-v3E+ÃP»þàþð ÿðÿñÿòé ?interrupt-controller@fee20000arm,gic-v3-itséø»þâ?ppi-partitionsinterrupt-partition-0?interrupt-partition-1?saradc@ff100000rockchip,rk3399-saradc»ÿé> àPeÖsaradcapb_pclkÊÔ Ñsaradc-apbâokayi2c@ff110000rockchip,rk3399-i2c»ÿiA˜ ëÂàAU Öi2cpclké;†default”;+âokay  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Öpclk_efusecpu-id@7»cpu-leakage@17»gpu-leakage@18»center-leakage@19»cpu-leakage@1a»logic-leakage@1b»wafer-info@1c»dma-controller@ff6d0000arm,pl330arm,primecell»ÿm@ é Å ÐàÓ Öapb_pclk?^dma-controller@ff6e0000arm,pl330arm,primecell»ÿn@ é Å ÐàÔ Öapb_pclk?Mclock-controller@ff750000rockchip,rk3399-pmucru»ÿuà—Öxin24m:. çi€˜(Jñ?€clock-controller@ff760000rockchip,rk3399-cru»ÿvà—Öxin24m:. çˆiÀÀ@ÂÁBÉÂCãÞxíD˜#g¸€/¯;šÊðÑ€xhÀ<4`õáõáúð€#ÃFõáúð€ׄׄ ë ëÂׄ?syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd»ÿw+?io-domains"rockchip,rk3399-io-voltage-domainâokay ôI ˜ - mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0àw¥oÖdphy-refdphy-cfggrf, + âdisabled?¬usb2phy@e450rockchip,rk3399-usb2phy»äPà{Öphyclk.clk_usbphy0_480mâokay?/host-port +é llinestateâokay²™?0otg-port +0éghjlotg-bvalidotg-idlinestateâokay?3usb2phy@e460rockchip,rk3399-usb2phy»ä`à|Öphyclk.clk_usbphy1_480mâokay?1host-port +é llinestateâokay²™?2otg-port +0élmolotg-bvalidotg-idlinestateâokay?5phy@f780rockchip,rk3399-emmc-phy»÷€$àšÖemmcclk 62 + âdisabled J?.pcie-phyrockchip,rk3399-pcie-phyàŠÖrefclk +ʇÑphyâokayR§˜õáiŠ?phy@ff7c0000rockchip,rk3399-typec-phy»ÿ|à~}Ötcpdcoretcpdphy-refi~˜úð€,Ê•”LÑuphyuphy-pipeuphy-tcphy:âokaydp-port +?7usb3-port +?4phy@ff800000rockchip,rk3399-typec-phy»ÿ€à€Ötcpdcoretcpdphy-refi€˜úð€, Ê�œMÑuphyuphy-pipeuphy-tcphy:âokaydp-port +?8usb3-port +?6watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt»ÿ„€à|éxrktimer@ff850000rockchip,rk3399-timer»ÿ…éQàhZ Öpclktimerspdif@ff870000rockchip,rk3399-spdif»ÿ‡éBÑ^Ötx ÖmclkhclkàU׆default”›,È âdisabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s»ÿˆ:é'Ñ^^ÖtxrxÖi2s_clki2s_hclkàVÔ†bclk_onbclk_off”œV�,È âdisabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s»ÿ‰é(Ñ^^ÖtxrxÖi2s_clki2s_hclkàWÕ†default”ž,È âdisabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s»ÿŠé)Ñ^^ÖtxrxÖi2s_clki2s_hclkàXÖ,Èâokay?¯vop@ff8f0000rockchip,rk3399-vop-lit »ÿ� ÿ� éwiÛÛ˜ׄõáàÛµÛÖaclk_vopdclk_vophclk_vop ±Ÿ,Ê Ñaxiahbdclkâokayport+endpoint@0»Ù ?¶endpoint@1»Ù¡?»endpoint@2»Ù¢?´endpoint@3»Ù£?¸endpoint@4»Ù¤?:iommu@ff8f3f00rockchip,iommu»ÿ�?éwàÛÛ Öaclkiface, ¸âokay?Ÿvop@ff900000rockchip,rk3399-vop-big »ÿ� ÿ� éviÙÙ˜ׄõáàÙ´ÙÖaclk_vopdclk_vophclk_vop ±¥,Ê Ñaxiahbdclkâokayport+endpoint@0»Ù¦?ºendpoint@1»Ù§?µendpoint@2»Ù¨?³endpoint@3»Ù©?·endpoint@4»Ùª?9iommu@ff903f00rockchip,iommu»ÿ�?évàÙÙ Öaclkiface, ¸âokay?¥isp0@ff910000rockchip,rk3399-cif-isp»ÿ‘@é+ànéãÖispaclkhclk ±«´¬¹dphy, âdisabledports+port@0»+iommu@ff914000rockchip,iommu »ÿ‘@ÿ‘Pé+àéã Öaclkiface ¸, j?«isp1@ff920000rockchip,rk3399-cif-isp»ÿ’@é,àoêäÖispaclkhclk ±­´®¹dphy, âdisabledports+port@0»+iommu@ff924000rockchip,iommu »ÿ’@ÿ’Pé,àêä Öaclkiface ¸, j?­hdmi-soundsimple-audio-card …i2s ž ¸hdmi-soundâokaysimple-audio-card,cpu ϯsimple-audio-card,codec ϰhdmi@ff940000rockchip,rk3399-dw-hdmi»ÿ”lé(àtqpoÖiahbisfrcecgrfref,:Èâokay Ù±†default”²?°ports+port@0»+endpoint@0»Ù³?¨endpoint@1»Ù´?¢port@1»mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi»ÿ–€é- à¢p£oÖrefpclkphy_cfggrf,ÊûÑapb:+ âdisabledports+port@0»+endpoint@0»Ùµ?§endpoint@1»Ù¶? mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi»ÿ–€€é. à¢q¤oÖrefpclkphy_cfggrf,ÊüÑapb:+ + âdisabled?®ports+port@0»+endpoint@0»Ù·?©endpoint@1»Ù¸?£edp@ff970000rockchip,rk3399-edp»ÿ—€é àjlo Ödppclkgrf†default”¹,ÊÑdp: âdisabledports+port@0»+endpoint@0»Ùº?¦endpoint@1»Ù»?¡gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860»ÿš0é ljobmmugpuàÐç,#âokay ¼ å½?gpinctrlrockchip,rk3399-pinctrl:º+Ãgpio@ff720000rockchip,gpio-bank»ÿrà€é ñ E?'gpio@ff730000rockchip,gpio-bank»ÿsà€é ñ E?‰gpio@ff780000rockchip,gpio-bank»ÿxàPé ñ E?Egpio@ff788000rockchip,gpio-bank»ÿx€àQé ñ E?"gpio@ff790000rockchip,gpio-bank»ÿyàRé ñ Epcfg-pull-up ?Àpcfg-pull-down ?Âpcfg-pull-none )?¾pcfg-pull-none-12ma ) 6 ?Ápcfg-pull-none-13ma ) 6 ?¿pcfg-pull-none-18ma ) 6pcfg-pull-none-20ma ) 6pcfg-pull-up-2ma  6pcfg-pull-up-8ma  6pcfg-pull-up-18ma  6pcfg-pull-up-20ma  6pcfg-pull-down-4ma  6pcfg-pull-down-8ma  6pcfg-pull-down-12ma  6 pcfg-pull-down-18ma  6pcfg-pull-down-20ma  6pcfg-output-high Epcfg-output-low Qpcfg-input-enable \pcfg-input-pull-up \ pcfg-input-pull-down \ clockclk-32k i¾?Œcifcif-clkin i ¾cif-clkouta i ¾edpedp-hpd i¾?¹gmacrgmii-pinsð i¿¾ ¾ ¿ ¾ ¾¾¾¾¿¿¾¾¿¿?rmii-pins  i ¾ ¿ ¾ ¾ ¾¾¾¾¿¿phy-intb i À?phy-rstb i¾?i2c0i2c0-xfer i¾¾?†i2c1i2c1-xfer i¾¾?;i2c2i2c2-xfer iÁÁ?<i2c3i2c3-xfer i¾¾?=i2c4i2c4-xfer i ¾ ¾?�i2c5i2c5-xfer i ¾ ¾?>i2c6i2c6-xfer i ¾ ¾??i2c7i2c7-xfer i¾¾?@i2c8i2c8-xfer i¾¾?�i2s0i2s0-2ch-bus` i¾¾¾¾¾¾i2s0-2ch-bus-bclk-off` i¾¾¾¾¾¾i2s0-8ch-bus� i¾¾¾¾¾¾¾¾¾?œi2s0-8ch-bus-bclk-off� i¾¾¾¾¾¾¾¾¾?�i2s1i2s1-2ch-busP i¾¾¾¾¾?ži2s1-2ch-bus-bclk-offP i¾¾¾¾¾sdio0sdio0-bus1 iÀsdio0-bus4@ iÀÀÀÀ?$sdio0-cmd iÀ?%sdio0-clk i¾?&sdio0-cd iÀsdio0-pwr iÀsdio0-bkpwr iÀsdio0-wp iÀsdio0-int iÀsdmmcsdmmc-bus1 iÀsdmmc-bus4@ iÀ À À À?(sdmmc-clk i ¾?)sdmmc-cmd i À?*sdmmc-cd iÀsdmmc-wp iÀsdmmc0-det-l iÀ?+sdmmc0-pwr-h i¾?Äsuspendap-pwroff i¾?‹ddrio-pwroff i¾spdifspdif-bus i¾?›spdif-bus-1 i¾spi0spi0-clk iÀ?Nspi0-cs0 iÀ?Qspi0-cs1 iÀspi0-tx iÀ?Ospi0-rx iÀ?Pspi1spi1-clk i À?Rspi1-cs0 i À?Uspi1-rx iÀ?Tspi1-tx iÀ?Sspi2spi2-clk i À?Vspi2-cs0 i À?Yspi2-rx i À?Xspi2-tx i À?Wspi3spi3-clk iÀ?�spi3-cs0 iÀ?„spi3-rx iÀ?ƒspi3-tx iÀ?‚spi4spi4-clk iÀ?Zspi4-cs0 iÀ?]spi4-rx iÀ?\spi4-tx iÀ?[spi5spi5-clk iÀ?_spi5-cs0 iÀ?bspi5-rx iÀ?aspi5-tx iÀ?`testclktest-clkout0 i¾test-clkout1 i¾test-clkout2 i¾tsadcotp-pin i¾?hotp-out i¾?iuart0uart0-xfer iÀ¾?Auart0-cts i¾?Cuart0-rts i¾?Buart1uart1-xfer i À ¾?Juart2auart2a-xfer iÀ ¾uart2buart2b-xfer iÀ¾uart2cuart2c-xfer iÀ¾?Kuart3uart3-xfer iÀ¾?Luart3-cts i¾uart3-rts i¾uart4uart4-xfer iÀ¾?…uarthdcpuarthdcp-xfer iÀ¾pwm0pwm0-pin i¾?‘pwm0-pin-pull-down iÂvop0-pwm-pin i¾vop1-pwm-pin i¾pwm1pwm1-pin i¾?’pwm1-pin-pull-down iÂpwm2pwm2-pin i¾pwm2-pin-pull-down iÂ?“pwm3apwm3a-pin i¾?”pwm3bpwm3b-pin i¾hdmihdmi-i2c-xfer i¾¾hdmi-cec i¾?²pciepci-clkreqn-cpm i¾pci-clkreqnb-cpm i¾fusb30xfusb0-int iÀ?Žgpio-ledslan-led-pin i¾?Çsys-led-pin i ¾?Èwan-led-pin i¾?Épmiccpu-b-sleep iÂ?‡gpu-sleep iÂ?ˆpmic-int-l iÀ?Šrockchip-keyreset-button-pin iÀ?Æsdiobt-host-wake-l i¾?Gbt-reg-on-h i ¾?Fbt-wake-l i¾?Hwifi-reg_on-h i ¾?Êopp-table-0operating-points-v2 w? opp00 ‚Q– ‰ –¨ –¨Ð —œ@opp01 ‚#ÃF ‰ –¨ –¨Ðopp02 ‚0£, ‰ øP øPÐopp03 ‚<Ü ‰HHÐopp04 ‚G†Œ ‰B@B@Ðopp05 ‚Tfr ‰*ˆ*ˆÐopp-table-1operating-points-v2 w? opp00 ‚Q– ‰ –¨ –¨Ð —œ@opp01 ‚#ÃF ‰ –¨ –¨Ðopp02 ‚0£, ‰ –¨ –¨Ðopp03 ‚<Ü ‰ Yø YøÐopp04 ‚G†Œ ‰~ð~ðÐopp05 ‚Tfr ‰£è£èÐopp06 ‚_Ø" ‰ÈàÈàÐopp07 ‚kIÒ ‰O€O€Ðopp-table-2operating-points-v2?¼opp00 ‚ ë ‰ –¨ –¨Œ0opp01 ‚³Ü@ ‰ –¨ –¨Œ0opp02 ‚ׄ ‰ –¨ –¨Œ0opp03 ‚Íe ‰ Yø YøŒ0opp04 ‚#ÃF ‰HHŒ0opp05 ‚/¯ ‰ÈàÈàŒ0chosen ¨serial2:1500000n8external-gmac-clock fixed-clock sY@ clkin_gmac.?vcc3v3-sysregulator-fixedù 2Z 72Z  Ovcc3v3_syssÃ?vcc5v0-sysregulator-fixedù LK@7LK@ Ovcc5v0_syss™?Ãvcc1v8-s3regulator-fixedù w@7w@ Ovcc1v8_s3sI?Åvcc3v0-sdregulator-fixed ´ Ç'†default”Äù-ÆÀ7-ÆÀ Ovcc3v0_sds?,vcca0v9-s3regulator-fixed » 7 »  Ovcca0v9_s3sÅ?vcca1v8-s3regulator-fixedw@7w@ Ovcca1v8_s3sÅ?vbus-typecregulator-fixedLK@7LK@ Ovbus_typec?�gpio-keys gpio-keys ̆default”Ækey-reset ×2 ‰ éreset ï˜gpio-leds gpio-leds†default ”ÇÈÉled-lan ‰ égreen:lanled-sys '  éred:power úonled-wan ‰ égreen:wansdio-pwrseqmmc-pwrseq-simpleàD Öext_clock†default”Ê ' ?#vdd-5vregulator-fixedOvdd_5vù ?™ compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleduration-usexit-latency-usentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesnum-lanesvpcie0v9-supplyvpcie1v8-supplyvpcie3v3-supplyinterrupt-controllerpower-domainsrockchip,grfsnps,txpblassigned-clock-parentsassigned-clocksclock_in_outpinctrl-namespinctrl-0phy-handlephy-modephy-supplytx_delayrx_delaynvmem-cellsnvmem-cell-namesreset-assert-usreset-deassert-usreset-gpiosmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratescap-mmc-highspeedcd-gpiosdisable-wpvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nspagesizereg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyfcs,suspend-voltage-selectorregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-on-in-suspendregulator-suspend-microvoltregulator-init-microvoltvbus-supply#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmrockchip,enable-strobe-pulldownrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathenable-active-highgpioautorepeatdebounce-intervallabellinux,codedefault-state