Ð þímî8fð(þf¸rockchip,r88rockchip,rk3368 + 7Rockchip R88aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff660000Q/i2c@ff140000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/serial@ff180000m/serial@ff190000u/serial@ff690000}/serial@ff1b0000…/serial@ff1c0000�/spi@ff110000’/spi@ff120000—/spi@ff130000œ/mmc@ff0d0000¡/mmc@ff0f0000cpus+cpu-mapcluster0core0¦core1¦core2¦core3¦cluster1core0¦core1¦core2¦core3¦ cpu@0ªcpuarm,cortex-a53¶ºpsciÈ×cpu@1ªcpuarm,cortex-a53¶ºpsciÈ×cpu@2ªcpuarm,cortex-a53¶ºpsciÈ×cpu@3ªcpuarm,cortex-a53¶ºpsciÈ× cpu@100ªcpuarm,cortex-a53¶ºpsciÈ×cpu@101ªcpuarm,cortex-a53¶ºpsciÈ×cpu@102ªcpuarm,cortex-a53¶ºpsciÈ×cpu@103ªcpuarm,cortex-a53¶ºpsciÈ×arm-pmuarm,armv8-pmuv3`ßpqrstuvw ê psci arm,psci-0.2Ásmctimerarm,armv8-timer0ß ÿÿ ÿ ÿoscillator fixed-clockýn6 xin24m ×Dmmc@ff0c00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¶ÿ @-ðÑ€ ; È D r vBbiuciuciu-driveciu-sampleN ß Y €`reset ldisabledmmc@ff0d00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¶ÿ @-ðÑ€ ; É E s wBbiuciuciu-driveciu-sampleN ß!Y �`resetlokays Eƒ š¤µÂØ ãñdefault ÿ  mmc@ff0f00000rockchip,rk3368-dw-mshcrockchip,rk3288-dw-mshc¶ÿ@-ðÑ€ ; Ë G u yBbiuciuciu-driveciu-sampleN ß#Y ƒ`resetlokayš"Øãñdefault ÿsaradc@ff100000rockchip,saradc¶ÿ ß$4; I [Bsaradcapb_pclkY W `saradc-apblokayFspi@ff110000(rockchip,rk3368-spirockchip,rk3066-spi¶ÿ; A RBspiclkapb_pclk ß,ñdefaultÿ+ ldisabledspi@ff120000(rockchip,rk3368-spirockchip,rk3066-spi¶ÿ; B SBspiclkapb_pclk ß-ñdefaultÿ+ ldisabledspi@ff130000(rockchip,rk3368-spirockchip,rk3066-spi¶ÿ; C TBspiclkapb_pclk ß)ñdefaultÿ !+ ldisabledi2c@ff140000(rockchip,rk3368-i2crockchip,rk3288-i2c¶ÿ ß>+Bi2c; Nñdefaultÿ" ldisabledi2c@ff150000(rockchip,rk3368-i2crockchip,rk3288-i2c¶ÿ ß?+Bi2c; Oñdefaultÿ# ldisabledi2c@ff160000(rockchip,rk3368-i2crockchip,rk3288-i2c¶ÿ ß@+Bi2c; Pñdefaultÿ$ ldisabledi2c@ff170000(rockchip,rk3368-i2crockchip,rk3288-i2c¶ÿ ßA+Bi2c; Qñdefaultÿ% ldisabledserial@ff180000&rockchip,rk3368-uartsnps,dw-apb-uart¶ÿýn6; M UBbaudclkapb_pclk ß7R\ ldisabledserial@ff190000&rockchip,rk3368-uartsnps,dw-apb-uart¶ÿýn6; N VBbaudclkapb_pclk ß8R\ ldisabledserial@ff1b0000&rockchip,rk3368-uartsnps,dw-apb-uart¶ÿýn6; P XBbaudclkapb_pclk ß:R\ ldisabledserial@ff1c0000&rockchip,rk3368-uartsnps,dw-apb-uart¶ÿýn6; Q YBbaudclkapb_pclk ß;R\ ldisableddma-controller@ff250000arm,pl330arm,primecell¶ÿ%@ßit�; à Bapb_pclkthermal-zonescpu-thermal¦d¼ˆÊ&tripscpu_alert0Ú$øæÐ±passive×'cpu_alert1Ú8€æÐ±passive×(cpu_critÚsæÐ ±criticalcooling-mapsmap0ñ'0öÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿmap1ñ(0öÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ ÿÿÿÿÿÿÿÿgpu-thermal¦d¼ˆÊ&tripsgpu_alert0Ú8€æÐ±passive×)gpu_critÚÁ8æÐ ±criticalcooling-mapsmap0ñ)0öÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿtsadc@ff280000rockchip,rk3368-tsadc¶ÿ( ß%; H ZBtsadcapb_pclkY Ÿ `tsadc-apbñinitdefaultsleepÿ*+*/slokayF]×&ethernet@ff290000rockchip,rk3368-gmac¶ÿ) ßxmacirqˆ,8;  f g c € Å ]MBstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_maclokay•- rmii©output ¶. Æ Ü'B@ñdefaultÿ/ñ0úusb@ff500000 generic-ehci¶ÿP ß; Âlokayusb@ff5800002rockchip,rk3368-usbrockchip,rk3066-usbsnps,dwc2¶ÿX ß; ÁBotghost ,€€@@ lokaydma-controller@ff600000arm,pl330arm,primecell¶ÿ`@ßit�;  Bapb_pclk×Ei2c@ff650000(rockchip,rk3368-i2crockchip,rk3288-i2c¶ÿe; LBi2c ß<ñdefaultÿ0+lokaysyr827@40silergy,syr827¶@;Xvdd_cpug,ƒ ß4›ã`³@ÈÜî1rtc@51haoyu,hym8563¶Q  xin32k×Ui2c@ff660000(rockchip,rk3368-i2crockchip,rk3288-i2c¶ÿf ß=+Bi2c; Mñdefaultÿ2 ldisabledpwm@ff680000(rockchip,rk3368-pwmrockchip,rk3288-pwm¶ÿhùñdefaultÿ3; _ ldisabledpwm@ff680010(rockchip,rk3368-pwmrockchip,rk3288-pwm¶ÿhùñdefaultÿ4; _ ldisabledpwm@ff680020(rockchip,rk3368-pwmrockchip,rk3288-pwm¶ÿh ù; _ ldisabledpwm@ff680030(rockchip,rk3368-pwmrockchip,rk3288-pwm¶ÿh0ùñdefaultÿ5; _ ldisabledserial@ff690000&rockchip,rk3368-uartsnps,dw-apb-uart¶ÿi; O WBbaudclkapb_pclk ß9ñdefaultÿ6R\lokaymbox@ff6b0000rockchip,rk3368-mailbox¶ÿk0ß’“”•; E Bpclk_mailbox ldisabledpower-management@ff730000&rockchip,rk3368-pmusysconsimple-mfd¶ÿspower-controller!rockchip,rk3368-power-controller+×Hpower-domain@12¶ ð; Ê Í Ì È Æ Ç ¾ Ô Õ Ö Ù Ñ Û c h g n o r s f d d h i l k j n m$$789:;<=>?power-domain@14¶ ; Ð Ü o p $@ABpower-domain@16¶; Á À @$Csyscon@ff738000)rockchip,rk3368-pmugrfsysconsimple-mfd¶ÿs€×Iio-domains&rockchip,rk3368-pmu-io-voltage-domainlokay+6reboot-modesyscon-reboot-modeAHRBÃTRBÃbRBà rRBÃclock-controller@ff760000rockchip,rk3368-cru¶ÿv;DBxin24mˆ, ~× syscon@ff770000&rockchip,rk3368-grfsysconsimple-mfd¶ÿw×,io-domains"rockchip,rk3368-io-voltage-domainlokay‹˜¦¶watchdog@ff800000 rockchip,rk3368-wdtsnps,dw-wdt¶ÿ€; p ßOlokaytimer@ff810000,rockchip,rk3368-timerrockchip,rk3288-timer¶ÿ�  ßB; a U Bpclktimerspdif@ff880000rockchip,rk3368-spdif¶ÿˆ ß6; S Ð BmclkhclkÂEÇtxñdefaultÿFÑ ldisabledi2s-2ch@ff890000(rockchip,rk3368-i2srockchip,rk3066-i2s¶ÿ‰ ß(Bi2s_clki2s_hclk; T ÎÂEEÇtxrxÑ ldisabledi2s-8ch@ff898000(rockchip,rk3368-i2srockchip,rk3066-i2s¶ÿ‰€ ß5Bi2s_clki2s_hclk; R ÏÂEEÇtxrxñdefaultÿGÑ ldisablediommu@ff900800rockchip,iommu¶ÿ� ß; Ê Ô BaclkifaceâH ð ldisablediommu@ff914000rockchip,iommu ¶ÿ‘@ÿ‘P ß; Í Õ BaclkifaceðâH ý ldisablediommu@ff930300rockchip,iommu¶ÿ“ ß; Æ Ñ BaclkifaceâH ð ldisablediommu@ff9a0440rockchip,iommu ¶ÿš@@ÿš€@ ß ; Ð Ü Baclkifaceð ldisablediommu@ff9a0800rockchip,iommu¶ÿšß  ; Ð Ü Baclkifaceð ldisabledqos@ffad0000rockchip,rk3368-qossyscon¶ÿ­ ×7qos@ffad0080rockchip,rk3368-qossyscon¶ÿ­€ ×8qos@ffad0100rockchip,rk3368-qossyscon¶ÿ­ ×9qos@ffad0180rockchip,rk3368-qossyscon¶ÿ­€ ×:qos@ffad0200rockchip,rk3368-qossyscon¶ÿ­ ×;qos@ffad0280rockchip,rk3368-qossyscon¶ÿ­€ ×<qos@ffad0300rockchip,rk3368-qossyscon¶ÿ­ ×=qos@ffad0380rockchip,rk3368-qossyscon¶ÿ­€ ×>qos@ffad0400rockchip,rk3368-qossyscon¶ÿ­ ×?qos@ffae0000rockchip,rk3368-qossyscon¶ÿ® ×@qos@ffae0100rockchip,rk3368-qossyscon¶ÿ® ×Aqos@ffae0180rockchip,rk3368-qossyscon¶ÿ®€ ×Bqos@ffaf0000rockchip,rk3368-qossyscon¶ÿ¯ ×Cefuse@ffb00000rockchip,rk3368-efuse¶ÿ° +; q Bpclk_efusecpu-leakage@17¶temp-adjust@1f¶interrupt-controller@ffb71000 arm,gic-400-@¶ÿ·ÿ· ÿ·@ ÿ·`  ß ÿ×pinctrlrockchip,rk3368-pinctrlˆ,>I+Kgpio@ff750000rockchip,gpio-bank¶ÿu; @ ßQRb-×Rgpio@ff780000rockchip,gpio-bank¶ÿx; A ßRRb-gpio@ff790000rockchip,gpio-bank¶ÿy; B ßSRb-×Pgpio@ff7a0000rockchip,gpio-bank¶ÿz; C ßTRb-×.pcfg-pull-upn×Lpcfg-pull-down{pcfg-pull-noneŠ×Mpcfg-pull-none-12maŠ— ×Nemmcemmc-clk¦J×emmc-cmd¦K×emmc-pwr¦Lemmc-bus1¦Lemmc-bus4@¦LLLLemmc-bus8€¦KKKKKKKK×emmc-reset¦M×Ogmacrgmii-pinsð¦MMMN N NNN NMMMMMMrmii-pins ¦MMMN N NMMMM×/i2c0i2c0-xfer ¦MM×0i2c1i2c1-xfer ¦MM×2i2c2i2c2-xfer ¦ MM×"i2c3i2c3-xfer ¦MM×#i2c4i2c4-xfer ¦MM×$i2c5i2c5-xfer ¦MM×%i2si2s-8ch-bus�¦ M MMMMMMMM×Gpwm0pwm0-pin¦M×3pwm1pwm1-pin¦M×4pwm3pwm3-pin¦M×5sdio0sdio0-bus1¦Lsdio0-bus4@¦LLLL×sdio0-cmd¦L× sdio0-clk¦M× sdio0-cd¦Lsdio0-wp¦Lsdio0-pwr¦Lsdio0-bkpwr¦Lsdio0-int¦Lsdmmcsdmmc-clk¦ Msdmmc-cmd¦ Lsdmmc-cd¦ Lsdmmc-bus1¦Lsdmmc-bus4@¦LLLLspdifspdif-tx¦M×Fspi0spi0-clk¦L×spi0-cs0¦L×spi0-cs1¦Lspi0-tx¦L×spi0-rx¦L×spi1spi1-clk¦L×spi1-cs0¦L×spi1-cs1¦Lspi1-rx¦L×spi1-tx¦L×spi2spi2-clk¦ L×spi2-cs0¦ L×!spi2-rx¦ L× spi2-tx¦ L×tsadcotp-pin¦M×*otp-out¦M×+uart0uart0-xfer ¦LMuart0-cts¦Muart0-rts¦Muart1uart1-xfer ¦LMuart1-cts¦Muart1-rts¦Muart2uart2-xfer ¦LM×6uart3uart3-xfer ¦LMuart3-cts¦Muart3-rts¦Muart4uart4-xfer ¦LMuart4-cts¦Muart4-rts¦Mpcfg-pull-none-drv-8maŠ—×Jpcfg-pull-up-drv-8man—×Kirir-int¦L×Tkeyspwr-key¦L×Qledsstby-pwren¦ Mled-ctl¦M×Ssdiowifi-reg-on¦M×Wbt-rst¦M×Vusbhost-vbus-drv¦M×Xchosen´serial2:115200n8memoryªmemory¶@emmc-pwrseqmmc-pwrseq-emmcÿOñdefault ÀP×gpio-keys gpio-keysñdefaultÿQkey-powerÌ ÆR ÚGPIO Poweràtgpio-leds gpio-ledsled-0 Æ.Úr88:green:ledñdefaultÿSir-receivergpio-ir-receiver Æ.ñdefaultÿTsdio-pwrseqmmc-pwrseq-simple;U Bext_clockñdefaultÿVWÀ..× vcc18-regulatorregulator-fixedXvcc_18ƒw@›w@ÈÜî1×vcc-host-regulatorregulator-fixedë ÁRñdefaultÿX Xvcc_hostÈÜî1vcc-io-regulatorregulator-fixedXvcc_ioƒ2Z ›2Z ÈÜî1×vcc-lan-regulatorregulator-fixedXvcc_lanƒ2Z ›2Z ÈÜî×-vcc-sys-regulatorregulator-fixedXvcc_sysƒLK@›LK@ÈÜ×1vccio-wl-regulatorregulator-fixed Xvccio_wlƒ2Z ›2Z ÈÜî×vdd-10-regulatorregulator-fixedXvdd_10ƒB@›B@ÈÜî1 compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4spi0spi1spi2mmc0mmc1cpudevice_typeregenable-method#cooling-cellsphandleinterruptsinterrupt-affinityclock-frequencyclock-output-names#clock-cellsmax-frequencyclocksclock-namesfifo-depthresetsreset-namesstatusassigned-clocksassigned-clock-parentsbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-mmc-highspeed#io-channel-cellsvref-supplyreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaydr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supply#pwm-cells#mbox-cells#power-domain-cellspm_qospmu-supplyvop-supplyoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsaudio-supplygpio30-supplygpio1830-supplywifi-supplydmasdma-names#sound-dai-cellspower-domains#iommu-cellsrockchip,disable-mmu-resetinterrupt-controller#interrupt-cellsrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsstdout-pathreset-gpioswakeup-sourcelabellinux,codeenable-active-high